xa3s100e Xilinx Corp., xa3s100e Datasheet - Page 29

• Manufacturer Part Number: xa3s100e
• Description: Xa Spartan-3e Automotive Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Configuration and JTAG Timing
Table 34: Power-On Timing and the Beginning of Configuration
DS635 (v1.1) January 20, 2009
Product Specification
Notes:
1.
2.
3.
T
T
T
T
T
POR
PROG
PL
INIT
ICCK
(2)
The numbers in this table are based on the operating conditions set forth in
and V
Power-on reset and the clearing of configuration memory occurs during this period.
This specification applies only to the Master Serial, SPI, BPI-Up, and BPI-Down modes.
(2)
Symbol
(3)
CCAUX
R
lines.
The time from the application of V
Bank 2 supply voltage ramps (whichever occurs last) to the
rising transition of the INIT_B pin
The width of the low-going pulse on the PROG_B pin
The time from the rising edge of the PROG_B pin to the
rising transition on the INIT_B pin
Minimum Low pulse width on INIT_B output
The time from the rising edge of the INIT_B pin to the
generation of the configuration clock signal at the CCLK
output pin
Description
CCINT
www.xilinx.com
, V
CCAUX
, and V
Table
CCO
6. This means power must be applied to all V
XA3S100E
XA3S250E
XA3S500E
XA3S1200E
XA3S1600E
All
XA3S100E
XA3S250E
XA3S500E
XA3S1200E
XA3S1600E
All
All
Device
-4 Speed Grade
Min
250
0.5
0.5
-
-
-
-
-
-
-
-
-
-
Max
0.5
0.5
4.0
5
5
5
5
7
1
2
2
-
-
CCINT
Units
, V
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
μs
ns
μs
CCO
29
,