ade7566acpzf8-rl Analog Devices, Inc., ade7566acpzf8-rl Datasheet - Page 134

• Manufacturer Part Number: ade7566acpzf8-rl
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc, And Lcd Driver
• Manufacturer: Analog Devices, Inc.

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Table 148. SPI Configuration SFR 1 (SPIMOD1, Address 0xE8)
Bit
[7:6]
5
4
3
2
[1:0]
Address
0xEF to
0xEE
0xED
0xEC
0xEB
0xEA
0xE9 to
0xE8
Mnemonic
Reserved
INTMOD
AUTO_SS
SS_EN
RxOFW
SPIR
Default
0
0
1
0
0
0
Reserved.
SPI interrupt mode.
INTMOD
0
1
Master mode, SS output control (see
AUTO_SS
0
1
Slave mode, SS input enable.
When this bit is set to Logic 1, the SS pin is defined as the slave select input pin for the SPI
slave interface.
Receive buffer overflow write enable.
RxOFW
0
1
Master mode, SPI SCLK frequency.
SPIR
00
01
10
11
Description
Rev. B | Page 134 of 152
Result
SPI interrupt is set when the SPI Rx buffer is full.
SPI interrupt is set when the SPI Tx buffer is empty.
Result
The SS pin is held low while this bit is cleared. This allows manual chip select
control using the SS pin.
Single byte read or write. The SS pin goes low during a single byte
transmission and then returns high.
Continuous Transfer. The SS pin goes low during the duration of the multibyte
continuous transfer and then returns high.
Result
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte is discarded.
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte overwrites the old data.
Result
f
f
f
f
CORE
CORE
CORE
CORE
/8 = 512 kHz (if f
/16 = 256 kHz (if f
/32 = 128 kHz (if f
/64 = 64 kHz (if f
CORE
CORE
CORE
CORE
Figure 110
= 4.096 MHz).
= 4.096 MHz).
= 4.096 MHz).
= 4.096 MHz).
).