ade7566acpzf8-rl Analog Devices, Inc., ade7566acpzf8-rl Datasheet - Page 83

• Manufacturer Part Number: ade7566acpzf8-rl
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc, And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Table 58. Program Control SFR (PCON, Address 0x87)
Bit
7
[6:0]
Table 59. Data Pointer Low SFR (DPL, Address 0x82)
Bit
[7:0]
Table 60. Data Pointer High SFR (DPH, Address 0x83)
Bit
[7:0]
Table 61. Data Pointer SFR (DPTR, Address 0x82 and Address 0x83)
Bit
[15:0]
Table 62. Stack Pointer SFR (SP, Address 0x81)
Bit
[7:0]
Table 63. Configuration SFR (CFG, Address 0xAF)
Bit
7
6
5
4
[3:2]
[1:0]
Mnemonic
Reserved
EXTEN
SCPS
MOD38EN
Reserved
XREN1, XREN0
Mnemonic
SP
Mnemonic
SMOD
Reserved
Mnemonic
Mnemonic
DPL
Mnemonic
DPH
DP
Default
0
0
Default
0
Default
0
Default
0
Default
7
Default
1
0
0
0
00
01
Description
Double baud rate control.
Reserved. These bits must be kept at 0 for proper operation.
Description
These bits contain the low byte of the data pointer.
Description
These bits contain the high byte of the data pointer.
Description
These bits contain the 2-byte address of the data pointer. DPTR is a combination of the DPH and DPL
SFRs.
Description
These bits contain the eight LSBs of the pointer for the stack.
Description
Reserved. This bit should be left set for proper operation.
Enhanced UART enable bit.
EXTEN
0
1
Synchronous communication selection bit.
SCPS
0
1
38 kHz modulation enable bit.
MOD38EN
0
1
Reserved. These bits should be kept at 0 for proper operation.
XREN[1:0]
XREN1 OR XREN0 = 1
XREN1 AND XREN0 = 0
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Rev. B | Page 83 of 152
Result
Standard 8052 UART without enhanced error-checking features.
Enhanced UART with enhanced error checking (see the UART Additional
Features section).
Result
SPI port is selected for control of the shared I
Result
38 kHz modulation is disabled.
Result
Disable MOVX instruction.
I
38 kHz modulation is enabled on the pins selected by the MOD38[7:0]
bits in the extended port configuration SFR (EPCFG, Address 0x9F).
Enable MOVX instruction to use 256 bytes of extended RAM.
2
C port is selected for control of the shared I
2
2
C/SPI pins and SFRs.
C/SPI pins and SFRs.