ml67q5200 ETC-unknow, ml67q5200 Datasheet - Page 11

• Manufacturer Part Number: ml67q5200
• Description: Digital Audio Controller
• Manufacturer: ETC-unknow

AC Characteristics
External RAM/RAM Read Cycle
(V
1.
ROMCS_N setup time
RAMCS_N setup time
ROMCS_N output hold time 1
RAMCS_N output hold time 1
XA[19:1] setup time
XA[19:1] hold time 1
XBS_N[1:0] setup time
XBS_N[1:0] hold time 1
XOE_N pulse width
XD[15:0] input setup time
XD[15:0] input hold time
DD_CORE
n
Address setup time and XOE_N/XWE_N pulse width are parameters that can be set by the ROMAC/RAMAC registers.
0
= address setup time, n
= 1.65 V to 1.95 V, V
Parameter
1
= XOE_N/XWE_N pulse width, Tc = HCLK cycle.
XBS_N[1:0]/PIOC[9:8]
XD[15:0]/PIOA[15:0]
ROMCS_N/PIOC[3]
XA[19:1]/PIOC[2:0]
RAMCS_N/PIOC[4]
XOE_N/PIOC[6]
DD_IO
PIOB[15:0]
= 2.7 V to 3.6 V, T
t
t
t
t
t
t
t
t
t
t
t
XROMCS
XRAMCS
XROMCSH1
XRAMCSH1
XAS
XAH1
XBS
XBH1
XOEW
XDIS
XDIH
[1]
Symbol
Figure 2. External ROM/RAM Read Cycle Timing
A
= –30°C to +70°C)
Condition
CL = 50 pF
t
XOEW
t
t
XAS
XBS
t
XROMCS
, t
XRAMCS
t
XDIS
(n
(n
(n
(n
0
0
0
0
n
+n
+n
+n
+n
1
Tc - 10
Min
1
1
1
1
40
Tc
Tc
-5
-5
0
)Tc - 10
)Tc - 10
)Tc - 10
)Tc - 10
t
XAH2
t
t
XDIH
BH1
t
XROMCSH1
Typ
—
—
—
—
—
—
—
—
—
—
—
, t
XRAMCSH1
ML675200/ML67Q5200
Oki Semiconductor • 11
Max
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns