mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 226
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mc68hc908gp32
Manufacturer Part Number
mc68hc908gp32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GP32.pdf
(266 pages)
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Development Support
event, the CGMOUT frequency is equal to the CGMXCLK frequency, and the OSC1 input directly
generates internal bus clocks. In this case, the OSC1 signal must have a 50% duty cycle at maximum bus
frequency.
If monitor mode was entered with V
either IRQ or RST.
This condition states that as long as V
V
then the COP will be disabled. In the latter situation, after V
removed from the IRQ pin in the interest of freeing the IRQ for normal functionality in monitor mode.
18.3.1.2 Forced Monitor Mode
If entering monitor mode without high voltage on IRQ (where applied voltage is either V
all port C pin requirements and conditions, including the PTC3 frequency divisor selection, are not in
effect. This is to reduce circuit requirements when performing in-circuit programming.
If IRQ = V
If IRQ = V
crystal.
When forced monitor mode is entered, the COP is always disabled regardless of the state of IRQ or RST.
18.3.1.3 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 18-2
226
TST
is applied to RST after the initial reset to get into monitor mode (when V
DD
SS
summarizes the differences between user mode and monitor mode.
User
Monitor
Modes
on monitor mode entry, the monitor firmware initializes a 9600 baud rate using a 32.768 kHz
on monitor mode entry, an external oscillator of 9.8304 MHz is required for a 9600 baud rate.
If the reset vector is blank and monitor mode is entered, the chip will see an
additional reset cycle after the initial POR reset. Once the part has been
programmed, the traditional method of applying a voltage, V
must be used to enter monitor mode.
Exiting monitor mode after it has been initiated by having a blank reset
vector requires a power-on reset (POR). Pulling RST low will not exit
monitor mode in this situation.
Vector High
$FFFE
$FEFE
Reset
Vector Low
$FFFF
$FEFF
Reset
TST
MC68HC908GP32 Data Sheet, Rev. 10
Table 18-2. Mode Differences
TST
on IRQ, then the COP is disabled as long as V
is maintained on the IRQ pin after entering monitor mode, or if
Vector High
$FEFC
$FFFC
Break
NOTE
NOTE
Functions
Vector Low
$FFFD
$FEFD
TST
Break
is applied to the RST pin, V
Vector High
$FEFC
$FFFC
SWI
TST
TST
, to IRQ
was applied to IRQ),
Vector Low
Freescale Semiconductor
$FFFD
$FEFD
SWI
TST
DD
is applied to
or V
TST
SS
can be
), then