mc68hc908gp20 Freescale Semiconductor, Inc, mc68hc908gp20 Datasheet - Page 60

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mc68hc908gp20

Manufacturer Part Number
mc68hc908gp20
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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3.4.2 Stop Mode
3.5 Central Processor Unit (CPU)
3.5.1 Wait Mode
3.5.2 Stop Mode
3.6 Clock Generator Module (CGM)
3.6.1 Wait Mode
Advance Information
60
The break module is inactive in stop mode. A break interrupt causes exit
from stop mode and sets the BW bit in the break status register. The
STOP instruction does not affect break module register states.
The WAIT instruction:
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator
stabilization delay.
The CGM remains active in wait mode. Before entering wait mode,
software can disengage and turn off the PLL by clearing the BCS and
PLLON bits in the PLL control register (PCTL). Less power-sensitive
Clears the interrupt mask (I bit) in the condition code register,
enabling interrupts. After exit from wait mode by interrupt, the I bit
remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from stop mode by external
interrupt, the I bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
MC68HC908GP20
Freescale Semiconductor
Rev 2.1

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