mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 254
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mc68hc912bd32
Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912BD32.pdf
(292 pages)
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BRKCT0 — Breakpoint Control Register 0
Development Support
MC68HC912BD32 Rev 1.0
BKEN1 BKEN0
RESET:
0
0
1
1
BKEN1
0
1
0
1
Bit 7
0
Breakpoints Off
SWI — Dual Address Mode
BDM — Full Breakpoint Mode
BDM — Dual Address Mode
BKEN0
6
0
Read and write anytime.
This register is used to control the breakpoint logic.
BKEN1, BKEN0 — Breakpoint Mode Enable
Mode Selected
BKPM — Break on Program Addresses
BK1ALE — Breakpoint 1 Range Control
BK0ALE — Breakpoint 0 Range Control
This bit controls whether the breakpoint will cause a break on a match
(next instruction boundary) or on a match that will be an executable
opcode. Data and non-executed opcodes cannot cause a break if this
bit is set. This bit has no meaning in SWI dual address mode. The
SWI mode only performs program breakpoints.
Only valid in dual address mode.
Valid in all modes.
Freescale Semiconductor, Inc.
Table 61 Breakpoint Mode Control
For More Information On This Product,
0 = On match, break at the next instruction boundary
1 = On match, break if the match is an instruction that will be
0 = BRKDL will not be used to compare to the address bus.
1 = BRKDL will be used to compare to the address bus.
0 = BRKAL will not be used to compare to the address bus.
1 = BRKAL will be used to compare to the address bus.
BKPM
5
0
executed. This uses tagging as its breakpoint mechanism.
Go to: www.freescale.com
Development Support
4
0
0
BRKAH/L Usage
Address Match
Address Match
Address Match
BK1ALE
3
0
—
BK0ALE
2
0
BRKDH/L Usage
Address Match
Address Match
Data Match
—
1
0
0
Bit 0
0
0
R/W
Yes
Yes
No
—
Range
$0020
Yes
Yes
Yes
—
20-dev
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