mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 71
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mc68hc912bd32
Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912BD32.pdf
(292 pages)
- Current page: 71 of 292
- Download datasheet (4Mb)
FEELCK — Flash EEPROM Lock Control Register
FEETST — Flash EEPROM Module Test Register
FEEMCR — Flash EEPROM Module Configuration Register
Flash EEPROM Registers
3-flash
RESET:
RESET:
RESET:
FSTE
Bit 7
Bit 7
Bit 7
0
0
0
0
0
GADR
In normal modes the LOCK bit can only be written once after reset.
LOCK — Lock Register Bit
This register controls the operation of the Flash EEPROM array. BOOTP
cannot be changed when the LOCK control bit in the FEELCK register is
set or if ENPE in the FEECTL register is set.
BOOTP — Boot Protect
In normal mode, writes to FEETST control bits have no effect and always
read zero. The Flash EEPROM module cannot be placed in test mode
inadvertently during normal operation.
6
0
0
6
0
0
6
0
The boot block is located at $7800–$7FFF or $F800–$FFFF
depending upon the mapped location of the Flash EEPROM array
and mask set ($7C00–$7FFF or $FC00–$FFFF for 1K byte block).
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Enable write to FEEMCR register
1 = Disable write to FEEMCR register
0 = Enable erase and program of 1K byte or 2K byte boot block
1 = Disable erase and program of 1K byte or 2K byte boot block
HVT
Go to: www.freescale.com
5
0
0
5
0
0
5
0
Flash EEPROM
FENLV
4
0
0
4
0
0
4
0
FDISVFP
3
0
0
3
0
0
3
0
VTCK
2
0
0
2
0
2
0
0
MC68HC912BD32 Rev 1.0
Flash EEPROM Registers
STRE
1
0
0
1
0
1
0
0
Flash EEPROM
BOOTP
MWPR
LOCK
Bit 0
$00F4
Bit 0
Bit 0
$00F6
$00F5
1
0
0
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