mpc8245ec Freescale Semiconductor, Inc, mpc8245ec Datasheet - Page 44

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mpc8245ec

Manufacturer Part Number
mpc8245ec
Description
Mpc8245 Integrated Host Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Design
7
This section provides electrical and thermal design recommendations for successful application of the
MPC8245.
7.1
The AV
PLL and the MPC603e processor PLL. To ensure stability of the internal clocks, the power supplied to the
AV
frequency range of the PLLs. Two separate circuits similar to the one shown in
mount capacitors with minimum effective series inductance (ESL) is recommended for AV
power signal pins. Consistent with the recommendations of Dr. Howard Johnson in High Speed Digital
Design: A Handbook of Black Magic (Prentice Hall, 1993), using multiple small capacitors of equal value
is recommended over using multiple values.
Place the circuits as closely as possible to the respective input signal pins to minimize noise coupled from
nearby circuits. Routing from the capacitors to the input signal pins should be as direct as possible with
minimal inductance of vias.
7.2
Due to its dynamic power management feature, large address and data buses, and high operating
frequencies, the MPC8245 can generate transient power surges and high frequency noise in its power
supply, especially while driving large capacitive loads. This noise must be prevented from reaching other
components in the MPC8245 system, and the MPC8245 itself requires a clean, tightly regulated source of
power. Therefore, place at least one decoupling capacitor at each V
These decoupling capacitors should receive their power from dedicated power planes in the PCB, with
short traces to minimize inductance. These capacitors should have a value of 0.1 µF. Only ceramic SMT
(surface mount technology) capacitors should be used to minimize lead inductance, preferably 0508 or
0603, oriented such that connections are made along the length of the part.
In addition, several bulk storage capacitors should be distributed around the PCB, feeding the V
GV
should have a low ESR (equivalent series resistance) rating to ensure the quick response time necessary.
They should also be connected to the power and ground planes through two vias to minimize inductance.
Suggested bulk capacitors: 100–330 µF (AVX TPS tantalum or Sanyo OSCON).
44
DD
DD
, and LV
and AV
System Design
DD
PLL Power Supply Filtering
Decoupling Recommendations
and AV
DD
DD
2 input signals should be filtered of any noise in the 500-kHz to 10-MHz resonant
DD
planes, to enable quick recharging of the smaller chip capacitors. These bulk capacitors
2 power signals on the MPC8245 provide power to the peripheral logic/memory bus
V
DD
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
Figure 25. PLL Power Supply Filter Circuit
10 Ω
2.2 µF
GND
Low ESL Surface Mount Capacitors
2.2 µF
DD
AV
, OV
DD
or AV
DD
DD
, GV
Figure 25
2
DD
Freescale Semiconductor
, and LV
DD
using surface
and AV
DD
DD
, OV
pin.
DD
DD
2
,

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