mpc8245ec Freescale Semiconductor, Inc, mpc8245ec Datasheet - Page 8

• Manufacturer Part Number: mpc8245ec
• Description: Mpc8245 Integrated Host Processor
• Manufacturer: Freescale Semiconductor, Inc

Electrical and Thermal Characteristics
Figure 2
8
shows supply voltage sequencing and separation cautions.
Notes:
1. Numbers associated with waveform separations correspond to caution numbers listed in
2. See the Cautions section of
3. See
4. Refer to
5. HRST_CPU/HRST_CTRL must transition from a logic 0 to a logic 1 in less than one
6. PLL_CFG signals must be driven on reset and must be held for at least 25 clock cycles after the
SDRAM_SYNC_IN clock cycle for the device to be in the nonreset state.
negation of HRST_CTRL and HRST_CPU in order to be latched.
3.3 V
2.0 V
5 V
Table 8
0
Configuration Pins
Table 10
Figure 2. Supply Voltage Sequencing and Separation Cautions
for details on PLL relock and reset signal assertion timing requirements.
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
HRST_CTRL
HRST_CPU,
Power Supply Ramp Up
for additional information on reset configuration pin setup timing requirements.
8
Reset
11
Table 2
11
V
Maximum Rise Time Must Be Less Than
DD
10
for details on this topic.
10
Stable
One External Memory Clock Cycle
2
7, 9
Clock Cycles Setup Time
See Note 1
Nine External Memory
Relock
100 µs
Time
PLL
3
External Memory
Clock Cycles
LV
OV
V
HRST_CTRL
Asserted 255
HRST_CPU,
DD
DD
DD
/AV
@ 5 V
/GV
4
DD
5
DD
/AV
/(LV
3
DD
DD
2
@ 3.3 V - - - -)
Freescale Semiconductor
PLL
VM = 1.4 V
Table
6
Time
2.