gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 102

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gc80c510

Manufacturer Part Number
gc80c510
Description
Eprom/rom 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.2.11 Power Management
6.2.11.1 IDLE Mode
the user to modify the power consumption of the device.
Figure 6-24 Power Management Circuit
the idle bit is the last instruction that will be executed before the device goes into IDLE mode, the clock
to the CPU is halted, but not to the interrupt and peripherals such as Timer, Watchdog timer and serial
port blocks. This forces the CPU state to be frozen; the Program counter, the Stat Pointer, the Program
Status Word, the Accumulator and the other registers hold their contents. The ALE and /PSEN pins are
held high during the IDLE state. The port pins hold the logical states they had at the time IDLE was
activated. The IDLE mode can be terminated in two ways. Since the interrupt controller is still active,
the activation of any enabled interrupt can wake up the processor. This will automatically clear the IDL
bit, terminate the IDLE mode, and the Interrupt Service Routine (ISR) will be executed. After the ISR,
execution of the program will continue from the instruction which put the device into IDLE mode.
applying a high on the external RESETB pin, a Power-On-Rest condition or a Watchdog timer reset.
The external reset pin has to be held thigh for at least six machine cycles i.e. 24 clock periods to be
recognized as a valid reset. At the reset condition the program counter is reset to 0000h and all the
SFRs are set to the reset condition. Since the clock is already running there is no delay and execution
starts immediately. In the IDLE mode, the Watchdog timer continues to run, and if enabled, a time-out
will cause a watchdog timer interrupt which will wake up the device. The software must reset the
Watchdog timer in order to preempt the reset which will occur after 512 clock periods of the time-out.
When the MiDAS1.1 family is exiting from an IDLE mode with a reset, the instruction will start from
address 0000h. So there is no danger of unexpected writings.
The MiDAS1.1 family has two power saving features (Power-down mode and IDLE mode) that help
The user can put the device into idle mode by writing 1 to the bit PCON.0. The instruction that sets
The IDLE mode can also be exited by activating the reset. The device can be put into reset either by
XTAL2
PD
On-chip AMP
C
Ring OSC.
C
XTAL1
Page 102 of 211
PD
IDL
(Interrupt / Timer / UART /
ADC / PWM / WDT / PORT)
CPU
Peripheral
Functional Description

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