gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 51

• Manufacturer Part Number: gc80c510
• Description: Eprom/rom 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

6.2.3 WDT (Watchdog Timer)
MiDAS1.1 Family
monitor, a time-base generator, or an event timer. And it can detect the malfunction of program due to
external noise or other causes. It is basically a set of dividers that divide the system clock. The divider
output is selectable and determines the time-out interval. When the time-out occurs (counter overflow),
a flag is set, which can cause an interrupt if enabled, and a system reset can also be caused if it is
enabled. The interrupt will occur if the individual interrupt enable and the global enable are set. The
interrupt and reset functions are independent of each other and may be used separately or together
depending on the user software.
starts from a known state. This bit is self-clearing, i.e. after writing a 1 to this bit, the hardware will
automatically clear this bit. Not that WDT counter restart (RWT = 1) must be executed in WDT mode 0
(WD1 and WD0 are both “0”).
WD1 and WD0 (CKCON.7 and CKCON.6). When the selected time-out occurs, the Watchdog interrupt
flag WDIF (WDCON.3) is set. If the Watchdog reset EWT (WDCON.1) is enabled, then 256 clocks after
the time-out, if there is no RWT, a system reset due to Watchdog timer will occur. This will last for thirty
clock cycles, and the Watchdog timer reset flag WTRF (WDCON.2) will be set. This indicates to the
software that the Watchdog was the cause of the reset.
Figure 6-8 Block Diagram for Watchdog Timer
Note: RWT is only used with WDT mode 0 (WD[1:0] = 2’b00) for MiDAS1.1 Family.
The Watchdog timer is a free-running timer which can be programmed by user to serve as a system
The Watchdog timer should first be restarted by using RWT (WDCON.0). This ensures that the timer
The Watchdog timer will now count clock cycles. The time-out interval is selected by the two bits
F
F
F
F
OSC
OSC
OSC
OSC
/ 4
/ 16
/ 32
/ 1
* RWT is only used with WDT mode 0 (WD[1:0] = [0,0]) for MiDAS1.1 Family
* RWT is only used with WDT mode 0 (WD[1:0] = [0,0]) for MiDAS1.1 Family
WDCON.0
RESET
RWT
WD1
WDCON[7:6]
00
01
10
11
WD0
Clock
0
16-bit Counter
Figure 6-8
15
shows the block diagram for Watchdog timer.
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Overflow
2
16
(Refer to Application Note #009 (AN009))
(Refer to Application Note #009 (AN009))
256 clocks
WDCON.3
WDIF
Delay
WDCON.1
WDCON.2
EWDT
WTRF
EWT
EIE.4
Interrupt
WDT Reset