gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 27

• Manufacturer Part Number: gc80c510
• Description: Eprom/rom 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

6.1.4 CPU Timing
MiDAS1.1 Family
software instructions to generate timing delays. Also, it provided the user with an insight into the timing
differences between the MiDAS1.1 family and the standard 80C52 as shown in
designated a state. Thus each machine cycle is made up of four states, S1, S2, S3 and S4 in that order.
Due to the reduced time for each instruction execution, both the clock edges are used for internal timing.
Hence it is important that the duty cycle of the clock be as close to 50% as possible to avoid timing
conflicts. Since the MiDAS1.1 family fetches one opcode per machine cycle, in most of the instructions,
the number of machine cycles needed to execute the instruction is equal to the number of bytes in the
instruction.
Figure 6-2 Comparative Timing of the MiDAS1.1 family and Intel 80C52
GC80C510
CoreRiver
The CPU timing for the MiDAS1.1 family is an important aspect, especially for those who wish to use
In the MiDAS1.1 family, each machine cycle is four clock periods long. Each clock period is
80C52
Intel
PORT0
PORT2
PORT0
PORT2
XTAL1
XTAL1
PSEN
PSEN
ALE
ALE
IR
IR
ADDH_0
INST0
ADDL_12
ADDH_12
INST0
ADDL_1
INST0
ADDH_1
INST12
INST1
S1 S2 S3 S4
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12
ADDL_2
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ADDL_21
INST1
ADDH_2
ADDH_21
INST2
INST21
ADDL_3
1-byte 1-machine Cycle Instruction
1-byte 1-machine Cycle Instruction
INST2
INST1
ADDH_3
INST3
ADDL_22
ADDH_22
INST3
INST22
Figure
6-2.
(4
(12
INST2
clocks)
clocks)