isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 29
isp1161bm
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isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Philips Semiconductors
Table 5:
9397 750 09567
Product data
Symbol
DirectionPID[1:0]
Format
FunctionAddress[6:0]
Philips Transfer Descriptor (PTD): bit description
9.4.1 Partitions
9.4 HC’s internal FIFO buffer RAM structure
Access Description
R
R
R
According to the Universal Serial Bus Specification Rev. 2.0 , there are four types of
USB data transfers: Control, Bulk, Interrupt and Isochronous.
The HC’s internal FIFO buffer RAM is of a physical size of 4 kbytes. This internal
FIFO buffer RAM is used for transferring data between the microprocessor and USB
peripheral devices. This on-chip buffer RAM can be partitioned into two areas:
Acknowledged Transfer List (ATL) buffer and Isochronous (ISO) Transfer List (ITL)
buffer. The ITL buffer is a Ping-Pong structured FIFO buffer RAM that is used to keep
the payload data and their PTD header for Isochronous transfers. The ATL buffer is a
non Ping-Pong structured FIFO buffer RAM that is used for the other three types of
transfers.
For the ITL buffer, it can be further partitioned into ITL0 and ITL1 for the Ping-Pong
structure. The ITL0 buffer and ITL1 buffer always have the same size. The
microprocessor can put ISO data into either the ITL0 buffer or the ITL1 buffer. When
the microprocessor accesses an ITL buffer, the HC can take over another ITL buffer
at the same time. This architecture can improve the ISO transfer performance.
The HCD can assign the logical size for ATL buffer and ITL buffers at any time, but
normally at initialization after power-on reset, by setting the HcATLBufferLength
register (2BH - read, ABH - write) and HcITLBufferLength register (2AH - read, AAH -
write), respectively. However, the total length (ATL buffer + ITL buffer) should not
exceed 4 kbytes, the maximum RAM size.
internal FIFO buffer RAM. When assigning buffer RAM sizes, follow this formula:
ATL buffer length + 2
where: ITL buffer size is ITL0 buffer length or ITL1 buffer length.
The following assignments are examples of legal uses of the internal FIFO buffer
RAM:
•
•
•
ATL buffer length = 800H, ITL buffer length = 400H.
This is the maximum use of the internal FIFO buffer RAM.
ATL buffer length = 400H, ITL buffer length = 200H.
This is insufficient use of the internal FIFO buffer RAM.
ATL buffer length = 1000H, ITL buffer length = 0H.
This will use the internal FIFO buffer RAM for only ATL transfers.
00 — SETUP
01 — OUT
10 — IN
11 — reserved
The format of this data structure. If this is a Control, Bulk or Interrupt endpoint, then bit
Format = 0. If this is an Isochronous endpoint, then bit Format = 1.
This is the USB address of the function containing the endpoint that this PTD refers to.
Rev. 02 — 13 December 2002
(ITL buffer size)
Full-speed USB single-chip host and device controller
…continued
1000H (that is 4 kbytes)
Figure 26
shows the partitions of the
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
ISP1161
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