isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 56
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Philips Semiconductors
Table 26:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcLSThreshold register: bit allocation
31
23
15
0
7
0
10.2.4 HcLSThreshold register (R/W: 11H/91H)
10.3 HC Root Hub registers
The HcLSThreshold register contains an 11-bit value used by the HC to determine
whether to commit to the transfer of a maximum of 8-byte LS packet before EOF.
Neither the HC nor the HCD is allowed to change this value.
Code (Hex): 11 — read
Code (Hex): 91 — write
Table 27:
All registers included in this partition are dedicated to the USB Root Hub, which is an
integral part of the HC although it is a functionally separate entity. The HCD emulates
USBD accesses to the Root Hub via a register interface. The HCD maintains many
USB-defined hub features that are not required to be supported in hardware. For
example, the Hub’s Device, Configuration, Interface, and Endpoint Descriptors are
maintained only in the HCD as well as some static fields of the Class Descriptor. The
HCD also maintains and decodes the Root Hub’s device address as well as other
trivial operations that they are better suited to software than to hardware.
The Root Hub registers are developed to maintain the similarity of bit organization
and operation to typical hubs found in the system.
Bit
31 to 11
10 to 0
30
22
14
0
6
0
HcLSThreshold register: bit description
Symbol
LST[10:0]
reserved
29
21
13
0
5
1
Rev. 02 — 13 December 2002
Description
reserved
LSThreshold: Contains a value that is compared to the
FrameRemaining field before a low-speed transaction is initiated.
The transaction is started only if FrameRemaining is equal or
greater than this field. The value is calculated by the HCD, which
considers transmission and set-up overhead.
Full-speed USB single-chip host and device controller
28
20
12
0
4
0
reserved
reserved
LST[7:0]
00H
R/W
00H
R/W
R/W
R/W
27
19
11
0
3
1
26
18
10
1
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
LST[10:8]
25
17
9
1
1
0
ISP1161
56 of 137
24
16
8
0
0
0
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