lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 314

• Manufacturer Part Number: lan9312
• Description: Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.2 (04-08-08)
REGISTER #
0C82
0C64-0C7Fh
0C5Ah
0C5Bh
0C5Ch
0C5Dh
0C5Eh
0C51h
0C52h
0C53h
0C54h
0C55h
0C56h
0C57h
0C58h
0C59h
0C5Fh
0C60h
0C61h
0C62h
0C63h
0C80h
0C81h
1800h
h
-17FF
h
Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)
MAC_TX_128_TO_255_CNT_2
MAC_TX_1024_TO_MAX_CNT_2
MAC_TX_256_TO_511_CNT_2
MAC_TX_UNDSZE_CNT_2
MAC_TX_BRDCST_CNT_2
MAC_TX_MULCST_CNT_2
MAC_TX_512_TO_1023_CNT_2
MAC_TX_PKTLEN_CNT_2
MAC_TX_SNGLECOL_CNT_2
MAC_TX_65_TO_127_CNT_2
MAC_TX_TOTALCOL_CNT_2
MAC_TX_MULTICOL_CNT_2
MAC_TX_DEFER_CNT_2
MAC_TX_PKTOK_CNT_2
MAC_TX_EXCOL_CNT_2
MAC_TX_PAUSE_CNT_2
MAC_TX_LATECOL_2
MAC_RX_64_CNT_2
SWE_ALR_CMD
MAC_IMR_2
RESERVED
RESERVED
MAC_IPR_2
RESERVED
SYMBOL
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Switch Engine CSRs
DATASHEET
Port 2 MAC Transmit Deferred Count Register,
Section 14.5.2.25
Port 2 MAC Transmit Pause Count Register,
Port 2 MAC Transmit OK Count Register,
Port 2 MAC Transmit 64 Byte Count Register,
Port 2 MAC Transmit 65 to 127 Byte Count Register,
Section 14.5.2.29
Port 2 MAC Transmit 128 to 255 Byte Count Register,
Section 14.5.2.30
Port 2 MAC Transmit 256 to 511 Byte Count Register,
Section 14.5.2.31
Port 2 MAC Transmit 512 to 1023 Byte Count Register,
Section 14.5.2.32
Port 2 MAC Transmit 1024 to Max Byte Count Register,
Section 14.5.2.33
Port 2 MAC Transmit Undersize Count Register,
Section 14.5.2.34
Reserved for Future Use
Port 2 MAC Transmit Packet Length Count Register,
Section 14.5.2.35
Port 2 MAC Transmit Broadcast Count Register,
Section 14.5.2.36
Port 2 MAC Transmit Multicast Count Register,
Section 14.5.2.37
Port 2 MAC Transmit Late Collision Count Register,
Section 14.5.2.38
Port 2 MAC Transmit Excessive Collision Count Register,
Section 14.5.2.39
Port 2 MAC Transmit Single Collision Count Register,
Section 14.5.2.40
Port 2 MAC Transmit Multiple Collision Count Register,
Section 14.5.2.41
Port 2 MAC Transmit Total Collision Count Register,
Section 14.5.2.42
Port 2 MAC Interrupt Mask Register,
Port 2 MAC Interrupt Pending Register,
Reserved for Future Use
Switch Engine ALR Command Register,
Reserved for Future Use
314
REGISTER NAME
Section 14.5.2.43
Section 14.5.2.44
Section 14.5.3.1
Section 14.5.2.27
Section 14.5.2.26
Section 14.5.2.28
SMSC LAN9312
Datasheet