lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 323
lan9312
Manufacturer Part Number
lan9312
Description
Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9312.pdf
(458 pages)
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.2
14.5.2.1
31:12
BITS
11:8
7:4
3:0
RESERVED
Device Type Code (DEVICE_TYPE)
Chip Version Code (CHIP_VERSION)
Revision Code (REVISION)
Switch Port 0, Port 1, and Port 2 CSRs
This section details the switch Port 0(Host MAC), Port 1, and Port 2 CSRs. Each port provides a
functionally identical set of registers which allow for the configuration of port settings, interrupts, and
the monitoring of the various packet counters.
Because the Port 0, Port 1, and Port 2 CSRs are functionally identical, their register descriptions have
been consolidated. A lowercase “x” has been appended to the end of each switch port register name
in this section, where “x” should be replaced with “MII”, “1”, or “2” for the Port 0, Port 1, or Port 2
registers respectively. A list of the Switch Port 0, Port 1, and Port 2 registers and their corresponding
register numbers is included in
Port x MAC Version ID Register (MAC_VER_ID_x)
This read-only register contains switch device ID information, including the device type, chip version
and revision codes.
Register #:
Port0: 0400h
Port1: 0800h
Port2: 0C00h
DESCRIPTION
Table
DATASHEET
14.12.
323
Size:
32 bits
TYPE
RO
RO
RO
RO
Revision 1.2 (04-08-08)
DEFAULT
5h
8h
3h
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