xccace-tq144 Xilinx Corp., xccace-tq144 Datasheet - Page 20

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xccace-tq144

Manufacturer Part Number
xccace-tq144
Description
Ic Ace Controller Chip Tq144
Manufacturer
Xilinx Corp.
Datasheet

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System ACE CompactFlash Solution
Register Specification
The BYTE-mode register space of the MPU interface is shown in
Table 8: Register Address Map (BYTE Mode Addresses)
20
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E through 0x3F
Even Values
0x40 through 0x5E
Odd Values
0x41 through 0x5F
BYTE Address
(MPA [6:0])
BUSMODEREG
BUSMODEREG
--
--
STATUSREG(7:0)
STATUSREG(15:8)
STATUSREG(23:16)
STATUSREG(31:24)
ERRORREG(7:0)
ERRORREG(15:8)
ERRORREG(23:16)
ERRORREG(31:24)
CFGLBAREG(7:0)
CFGLBAREG(15:8)
CFGLBAREG(23:16)
CFGLBAREG(27:24)
MPULBAREG(7:0)
MPULBAREG(15:8)
MPULBAREG(23:16)
MPULBAREG(27:24)
SECCNTCMDREG(7:0)
SECCNTCMDREG(15:8)
VERSIONREG(7:0)
VERSIONREG(15:8)
CONTROLREG(7:0)
CONTROLREG(15:8)
CONTROLREG(23:16)
CONTROLREG(31:24)
FATSTATREG(7:0)
FATSTATREG(15:8)
--
DATABUFREG(7:0)
DATABUFREG(15:8)
Register Name
www.xilinx.com
Width Mode
--
--
--
1
1
8
8
8
8
8
8
8
8
8
8
8
4
8
8
8
4
8
8
8
8
8
8
8
8
8
8
8
8
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
--
--
R
R
R
R
R
R
R
R
R
R
--
Table
Used to control the data bus access mode (8-bit
BYTE mode or 16-bit WORD mode)
Reserved
Reserved
Used to monitor System ACE CF controller status
Used to indicate any existing error condition
Logical block address used by the Configuration
Controller during CompactFlash data transfers
Logical block address used by the MPU interface
during CompactFlash data transfers
Sector count and CompactFlash command
register
Version register
Used to control System ACE CF controller
operations
Contains information about the FAT table of the first
valid partition found in the CompactFlash device.
Reserved
Address range that provides read and write access
to the data buffer.
8.
Description
DS080 (v2.0) October 1, 2008
Product Specification
R

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