cyv15g0104trb Cypress Semiconductor Corporation., cyv15g0104trb Datasheet - Page 18

• Manufacturer Part Number: cyv15g0104trb
• Description: Independent Clock Hotlink Ii Serializer And Reclocking Deserializer
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-02100 Rev. *B
CYV15G0104TRB DC Electrical Characteristics
AC Test Loads and Waveforms
CYV15G0104TRB AC Electrical Characteristics
CYV15G0104TRB Transmitter LVTTL Switching Characteristics Over the Operating Range
f
t
t
t
Notes:
11. The common mode range defines the allowable range of INPUT+ and INPUT− when INPUT+ = INPUT−. This marks the zero-crossing between the true and
12. Maximum I
13. Typical I
14. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only.
15. The LVTTL switching threshold is 1.4V. All timing references are made relative to where the signal edges cross the threshold voltage.
16. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
V
V
V
V
V
I
I
VI
I
I
TS
TXCLK
TXCLKH
TXCLKL
Parameter
IHE
ILE
CC
CC
Differential Serial Line Receiver Inputs: INA1±, INA2±
Power Supply
OLC
ODIF
DIFFs
IHE
ILE
COM
GND
Parameter
[12, 13]
[12, 13]
complement inputs as the signal switches between a logic-1 and a logic-0.
outputs unloaded.
a continuous alternating 01 pattern. The redundant outputs on each channel are powered down and the parallel outputs are unloaded.
V
[9]
[11]
th
[16]
[16]
≤ 1 ns
= 1.4V
CC
CC
is measured under similar conditions except with V
R1 = 590Ω
R2 = 435Ω
C
(Includes fixture and
probe capacitance)
Output LOW Voltage
(V
Output Differential Voltage
|(OUT+) − (OUT−)|
Input Differential Voltage |(IN+) − (IN−)|
Highest Input HIGH Voltage
Lowest Input LOW Voltage
Input HIGH Current
Input LOW Current
Common Mode input range
Max Power Supply Current
Typical Power Supply Current
L
is measured with V
(c) LVTTL Input Test Waveform
≤ 7 pF
(a) LVTTL Output Test Load
CC
TXCLKB Clock Cycle Frequency
TXCLKB Period=1/f
TXCLKB HIGH Time
TXCLKB LOW Time
Referenced)
2.0V
0.8V
Description
CC
3.0V
C
L
= MAX,T
2.0V
0.8V
3.3V
TS
A
= 25°C, with all channels and Serial Line Drivers enabled, sending a continuous alternating 01 pattern, and
R1
R2
[14]
V
Description
[15]
th
≤ 1 ns
= 1.4V
CC
= 3.3V, T
100Ω differential load
150Ω differential load
100Ω differential load
150Ω differential load
V
V
((V
(V
REFCLKB
= MAX
REFCLKB
= 125 MHz
IN
IN
A
(continued)
CC
CC
= 25°C,with all channels enabled and one Serial Line Driver per channel sending
= V
= V
– 0.5V) max.
V
V
– 2.0V)+0.5)min,
Test Conditions
IHE
ILE
IHE
ILE
≤ 270 ps
Min.
Max.
Commercial
Commercial
20%
(d) CML/LVPECL Input Test Waveform
(Includes fixture and
probe capacitance)
(b) CML Output Test Load
R
L
= 100Ω
80%
V
V
V
V
V
IHE
ILE
CC
CC
CC
+1.25
–700
Min.
Typ.
CYV15G0104TRB
450
560
100
585
560
Min.
19.5
6.66
2.2
2.2
– 1.4
– 1.4
– 2.0
80%
R
L
[14]
V
V
CC
CC
51.28
Max.
1000
1200
1350
Max.
20%
Max
+3.1
150
V
900
690
660
≤ 270 ps
Page 18 of 27
CC
– 0.7
– 0.7
MHz
Unit
Unit
ns
ns
ns
mV
mV
mV
mA
mA
µA
µA
V
V
V
V
V
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