ncn6004a ON Semiconductor, ncn6004a Datasheet - Page 21

• Manufacturer Part Number: ncn6004a
• Description: Dual Sam/sim Interface Integrated Circuit
• Manufacturer: ON Semiconductor

POWER MANAGEMENT
the necessary output voltages to drive the 1.80 V, 3.0 V or
5.0 V smart card types. On top of that, the DC/DC converter
efficiency must absorb a minimum current on the V
supply.
(PWR_ON = L), the power management provides energy to
the card detection circuit only. All the card interface pins are
forced to ground potential, saving as much current as
possible out of the battery supply.
external MPU (CARD_SEL =H/L, PWR_ON = H, CS = L),
the power manager starts the DC/DC converter related to the
selected interface section.
CRD_VCC_B) voltage reaches the programmed value
(1.8 V, 3.0 V or 5.0 V), the circuit activates the card signals
according to the following sequence:
CRD_VCC_x → CRD_IO_x → CRD_C4_x → CRD_C8_x
→ CRD_CLK_x → CRD_RST_x
depending upon the state forced by the external MPU, when
straightly from 5.0 V to 1.80 V, care must be observed as the
stabilization time will be relatively long if no current is
absorbed from the related output pin.
possible to program simultaneously the two DC/DC
The main purpose of the power management is to provides
Beside the power conversion, in the Stand by mode
In the event of a power up request coming from the
When the selected section (either CRD_VCC_A or
The logic level of the data lines are asserted High or Low,
Although it is possible to change the output voltage
According to the typical sequence depicted, it is not
CRD_VCC_A PWR DOWN
CRD_VCC Rise Time
CRD_VCC_A
CRD_VCC_B
CARD_SEL
PWR_ON
RESET
SET
CS
Note : minimum 1 ms delay before to send a power Off command to the same
VCCton
see note
Figure 12. Card Power Supply Controls
selected output is recommended.
CRD_VCC No Change
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NCN6004A
bat
21
the start−up sequence is completed. Under no situation the
NCN6004A shall automatically launch a smart card ATR
sequence.
(CARD_SEL = H/L, PWR_ON = L, CS = L), or under a card
extraction, the ISO7816−3 power down sequence takes
place:
CRD_RST_x → CRD_CLK_x → CRD_C4_x →
CRD_C8_x → CRD_IO_x → CRD_VCC_x
are forced into the High impedance mode to avoid signal
collision with any data coming from the external MPU.
OUTPUT VOLTAGE PROGRAMMING
any of the DC/DC converters safely. In particular, the Turn
On/Turn Off of these converters is edge sensitive and
controlled by the rising/falling edges of the PWR_ON signal
applied with Chip Select pin Low. The CARD_SEL signal
is used to select either CRD_VCC_A or CRD_VCC_B as
defined by the functions programming in Table 2.
converters, but two separate sequences must take place. On
top of that, since the circuit is edge sensitive, the PWR_ON
signal must present such a transient when a given state is
expected for the converter. The PWR_ON and CS timings
definitions are given in Figure 13.
At the end of the transaction, asserted by the MPU
When CS = H, the bi−directional I/O lines (pins 9 and 19)
The internal logic provides a reliable circuit to activate
VCCtoff
VCCton