ncn6004a ON Semiconductor, ncn6004a Datasheet - Page 7

• Manufacturer Part Number: ncn6004a
• Description: Dual Sam/sim Interface Integrated Circuit
• Manufacturer: ON Semiconductor

PIN DESCRIPTION (continued)
1. The external inductors shall preferably have the same values. Depending upon the power absorbed by the load, the inductor can range
Pin
28
29
30
31
32
33
34
35
36
37
38
from 10 mH to 47 mH. To achieve the highest yield, the inductor shall have an ESR < 1.0 W.
PWR_VCC_A
PWR_VCC_B
CRD_VCC_A
CRD_VCC_B
CRD_CLK_A
CRD_CLK_B
CRD_RST_B
PWR_GND
CRD_IO_B
Symbol
L2b
L1b
INPUT/OUTPUT
OUTPUT
OUTPUT
OUTPUT
POWER
POWER
POWER
POWER
POWER
POWER
POWER
Type
This pin is connected to the positive external power supply. The device sustains any
voltage from +2.7 V to +5.5 V. This voltage supplies the NCN6004A internal circuits and
is regulated by the internal DC/DC converter to provide the DC voltage to the external
card. A high quality capacitor must be connected across pin 28 and PWR_GND, 10
mF/6.0 V ceramic X7R or X5R type is recommended.
Note: The voltage present at pin 28 and 33 must be equal to the voltage present at pin 42.
This pin provides the power supply to the external smart card #A. The V
defined by programming the NCN6004A accordingly. Since the cards have independent
DC/DC converter, the output voltage can have any value independently from CARD_B.
A high quality, low ESR capacitor is mandatory to achieve the V
two 4.7 mF/6.0 V ceramic X7R or X5R capacitors in parallel is recommended.
This pin is connected to the CLK external smart card #A pin. The signal comes from the
built−in frequency divider dedicated to the #A card. The clock is selected and controlled by
setting the logic inputs according to Table 1. The slope of the output clock can be selected
between one of the two programmable mode: SLOW or FAST (Table 8). The pin is
hardwired to zero, the bias being provided by the V
drops below 2.7 V, or during the CRD_VCC_A startup time.
This pin is connected to the CLK external smart card #B pin. The signal comes from the
built−in frequency divider dedicated to the #B card. The clock is selected and controlled by
setting the logic inputs according to Table 1. The slope of the output clock can be selected
between one of the two programmable mode: SLOW or FAST (Table 8). The pin is
hardwired to zero, the bias being provided by the V
drops below 2.7 V, or during the CRD_VCC_B startup time.
This pin provides the power supply to the external smart card #B. The V
defined by programming the NCN6004A accordingly. Since the cards have independent
DC/DC converter, the output voltage can have any value independently from CARD_A.
A high quality, low ESR capacitor is mandatory to achieve the V
two 4.7 mF/6.0 V ceramic X7R or X5R capacitors in parallel is recommended.
This pin is connected to the positive external power supply. The device sustains any
voltage from +2.7 V to +6.0 V. This voltage supplies the NCN6004A internal circuits and
is regulated by the internal DC/DC converter to provide the DC voltage to the external
card. A high quality capacitor must be connected across pin 33 and PWR_GND,
10 mF/6.0 V ceramic X7R type is recommended.
Note: The voltage present on pin 28 and 33 must be equal to the voltage present on pin 42
Connects one side of the external DC/DC converter inductor #B (Note 1).
Connects one side of the external DC/DC converter inductor #B (Note 1).
This pin carries the power current flow coming from the built in DC/DC converters. It is
associated with the external card # B. It must be connected to the system Ground and
care must be observed at PCB layout level to avoid the risk of spike voltages on the logic
lines.
This pin carries the data serial connection between the external smart card #B and the
microcontroller. A built−in bi−directional level shifter is used to adapt the card and the
MCU, regardless of the power supply voltage of each signals.
This pin is biased by a pull up resistor connected to CRD_VCC_A. When CS = High, the
CRD_IO_A holds the previous I/O logic state and resume to a normal operation when this
pin is reactivated.
The pin is hardwired to zero, the bias being provided by the V
V
This pin is connected to the external smart card #B to support the RESET signal. A
built−in level shifter is used to adapt the card and the MCU, regardless of the power
supply voltage of each signals.
The signal present at this pin is latched upon either CARD_SEL or CS or PGM positive
going transient and resume to a transparent mode when card #B is selected.
The pin is hardwired to zero, the bias being provided by the V
V
CC
CC
voltage drops below 2.7 V, or during the CRD_VCC_B startup time.
voltage drops below 2.7 V, or during the CRD_VCC_B startup time.
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NCN6004A
7
Description
CC
CC
supply, when either the V
supply, when either the V
CC
CC
CC
CC
supply, when either the
supply, when either the
specifications. Using
specifications. Using
CC
CC
voltage is
voltage is
CC
CC
voltage
voltage