hd64338342hw Renesas Electronics Corporation., hd64338342hw Datasheet - Page 143
hd64338342hw
Manufacturer Part Number
hd64338342hw
Description
Renesas 8-bit Single-chip Microcomputer H8 Family/h8/300l Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HD64338342HW.pdf
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Bit n: WKPn edge select (WKEGSn)
Bit n selects WKPn pin input sensing.
Bit n
WKEGSn
0
1
3.3.3
There are 13 external interrupts: IRQ
1. Interrupts WKP
Interrupts WKP
WKP
rising or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.
Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in
IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.
When WKP
number 9 is assigned to interrupts WKP
vector number, so the interrupt-handling routine must discriminate the interrupt source.
2. Interrupts IRQ
Interrupts IRQ4 to IRQ
detected by either rising edge sensing or falling edge sensing, depending on the settings of bits
IEG
When these pins are designated as pins IRQ
designated edge is input, the corresponding bit in IRR1 is set to 1, requesting an interrupt.
Recognition of these interrupt requests can be disabled individually by clearing bits IEN4 to IEN0
to 0 in IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.
When IRQ
numbers 8 to 4 are assigned to interrupts IRQ
to IRQ
4
0
to IEG
. When these pins are designated as pins WKP
4
(low). Table 3.2 gives details.
External Interrupts
4
7
0
to IRQ
to WKP
in IEGR.
WKPn pin falling edge detected
WKPn pin rising edge detected
Description
7
to WKP
0
4
interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector
7
to IRQ
0
to WKP
interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector
0
are requested by input signals to pins IRQ
0
are requested by either rising or falling edge input to pins WKP
0
0
4
to IRQ
7
to WKP
4
0
to IRQ
4
and WKP
to IRQ
0
. All eight interrupt sources have the same
0
7
in port mode register 3 and 1 and the
0
. The order of priority is from IRQ
to WKP
7
Rev. 6.00 Aug 04, 2006 page 107 of 680
to WKP
0
in port mode register 5 and a
0
4
.
Section 3 Exception Handling
to IRQ
0
. These interrupts are
REJ09B0145-0600
(initial value)
(n = 7 to 0)
0
7
(high)
to
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