hd64338342hw Renesas Electronics Corporation., hd64338342hw Datasheet - Page 335

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hd64338342hw

Manufacturer Part Number
hd64338342hw
Description
Renesas 8-bit Single-chip Microcomputer H8 Family/h8/300l Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit 6: Timer overflow flag L (OVFL)
Bit 6 is a status flag indicating that TCG has overflowed from H'FF to H'00 when the input capture
input signal is low, or in interval operation. This flag is set by hardware and cleared by software.
It cannot be set by software.
Bit 6
OVFL
0
1
Bit 5: Timer overflow interrupt enable (OVIE)
Bit 5 selects enabling or disabling of interrupt generation when TCG overflows.
Bit 5
OVIE
0
1
Bit 4: Input capture interrupt edge select (IIEGS)
Bit 4 selects the input capture input signal edge that generates an interrupt request.
Bit 4
IIEGS
0
1
Clearing condition:
After reading OVFL = 1, cleared by writing 0 to OVFL
Setting condition:
Set when TCG overflows from H'FF to H'00
TCG overflow interrupt request is disabled
TCG overflow interrupt request is enabled
Interrupt generated on rising edge of input capture input signal
Interrupt generated on falling edge of input capture input signal
Description
Description
Description
Rev. 6.00 Aug 04, 2006 page 299 of 680
REJ09B0145-0600
Section 9 Timers
(initial value)
(initial value)
(initial value)

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