hd64338342hw Renesas Electronics Corporation., hd64338342hw Datasheet - Page 178

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hd64338342hw

Manufacturer Part Number
hd64338342hw
Description
Renesas 8-bit Single-chip Microcomputer H8 Family/h8/300l Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 5 Power-Down Modes
5.3.5
1. When external input signal changes before/after standby mode or watch mode
2. When external input signals cannot be captured because internal clock stops
3. Recommended timing of external input signals
Rev. 6.00 Aug 04, 2006 page 142 of 680
REJ09B0145-0600
When an external input signal such as IRQ or WKP is input, both the high- and low-level
widths of the signal must be at least two cycles of system clock or subclock
together in this section as the internal clock). As the internal clock stops in standby mode and
watch mode, the width of external input signals requires careful attention when a transition is
made via these operating modes.
The case of falling edge capture is illustrated in figure 5.3
As shown in the case marked "Capture not possible," when an external input signal falls
immediately after a transition to active (high-speed or medium-speed) mode or subactive
mode, after oscillation is started by an interrupt via a different signal, the external input signal
cannot be captured if the high-level width at that point is less than 2 t
To ensure dependable capture of an external input signal, high- and low-level signal widths of
at least 2 t
mode, as shown in "Capture possible: case 1."
External input signal capture is also possible with the timing shown in "Capture possible: case
2" and "Capture possible: case 3," in which a 2 t
Notes on External Input Signal Changes before/after Standby Mode
cyc
or 2 t
subcyc
are necessary before a transition is made to standby mode or watch
cyc
or 2 t
subcyc
level width is secured.
cyc
or 2 t
subcyc
SUB
.
(referred to

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