tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet - Page 54

• Manufacturer Part Number: tc58nvg0s3eta00
• Description: 1 Gbit 128m ? 8 Bit Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

APPLICATION NOTES AND COMMENTS
(1)
(2)
(3)
(4)
CE , WE , RE
Power-on/off sequence:
The timing sequence shown in the figure below is necessary for the power-on/off sequence.
The device internal initialization starts after the power supply reaches an appropriate level in the power on
sequence. During the initialization the device Ready/Busy signal indicates the Busy state as shown in the
figure below. In this time period, the acceptable commands are FFh or 70h.
The WP signal is useful for protecting against data corruption at power-on/off.
Power-on Reset
Prohibition of unspecified commands
prohibited. Stored data may be corrupted if an unknown command is entered during the command cycle.
Restriction of commands while in the Busy state
Ready/Busy
The operation commands are listed in Table 3. Input of a command other than those specified in Table 3 is
During the Busy state, do not input any command except 70h(71h) and FFh.
CLE, ALE
The following sequence is necessary because some input signals may not be stable at power-on.
0 V
WP
V
CC
Invalid
V
Power on
Don’t
care
100 µ s max
IL
2.5V
2.7 V
1 ms max
Reset
FF
54
V
IH
Operation
TC58NVG0S3ETA00
Don’t
care
Don’t
care
V
2010-01-25C
IL