tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet - Page 6

• Manufacturer Part Number: tc58nvg0s3eta00
• Description: 1 Gbit 128m ? 8 Bit Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

AC TEST CONDITIONS
PROGRAMMING AND ERASING CHARACTERISTICS
(Ta = 0 to 70℃, V
Data Output
When tREH is long, output buffers are disabled by /RE=High, and the hold time of data output depend on tRHOH
(25ns MIN). On this condition, waveforms look like normal serial read mode.
When tREH is short, output buffers are not disabled by /RE=High, and the hold time of data output depend on
tRLOH (5ns MIN). On this condition, output buffers are disabled by the rising edge of CLE,ALE,/CE or falling
edge of /WE, and waveforms look like Extended Data Output Mode.
Input level
Input pulse rise and fall time
Input comparison level
Output data comparison level
Output load
Note:
t
t
t
N
t
(1) Refer to Application Note (12) toward the end of this document.
(2) t
PROG
DCBSYW1
DCBSYW2
BERASE
SYMBOL
DCBSYW2
Busy to ready time depends on the pull-up resistor tied to the
(Refer to Application Note (9) toward the end of this document.)
PARAMETER
depends on the timing between internal programming time and data in time.
Average Programming Time
Data Cache Busy Time in Write Cache (following 11h)
Data Cache Busy Time in Write Cache (following 15h)
Number of Partial Program Cycles in the Same Page
Block Erasing Time
CC
= 2.7 to 3.6V)
PARAMETER
6
RY
/
BY
MIN
⎯
⎯
⎯
⎯
⎯
C
V
pin.
L
V
CC
CC
(100 pF) + 1 TTL
CONDITION
− 0.2 V, 0.2 V
: 2.7 to 3.6V
Vcc / 2
Vcc / 2
3 ns
TYP.
300
2.5
⎯
⎯
⎯
TC58NVG0S3ETA00
MAX
700
700
10
10
4
UNIT
ms
2010-01-25C
µ s
µ s
µ s
NOTES
(2)
(1)