lm2633mtd National Semiconductor Corporation, lm2633mtd Datasheet - Page 27

• Manufacturer Part Number: lm2633mtd
• Description: Advanced Two-phase Synchronous Triple Regulator Controller For Notebook Cpus
• Manufacturer: National Semiconductor Corporation

Output Capacitor Selection
Maximum ESR calculation
No matter how much capacitance there is, if the total com-
bined ESR is not less than a certain value, the load transient
requirement will not be met.
The maximum allowed total combined ESR is:
Example: V
Maximum ESR criterion can be used when the capacitance
is high enough, otherwise more capacitors than the number
determined by this criterion should be used.
Minimum capacitance calculation
In a CPU core or a GTL bus power supply, the minimum
output capacitance is typically dictated by the load transient
requirement. If there is not enough capacitance, the output
voltage excursion will exceed the maximum allowed value
even if the maximum ESR requirement is met. The
worst-case load transient is an unloading transient that hap-
pens when the input voltage is the highest and when the top
FET has just been turned off. The corresponding minimum
capacitance is calculated as follows:
Notice it is already assumed the total ESR is no greater than
R
negative value.
Example: R
10A, L = 2µH
Generally speaking, C
Maximum capacitance calculation
This subsection applies to Channel 1 / CPU core power
supply only.
If there is a need to change the CPU core voltage dynami-
cally (see Dynamic VID Change), there will be a maximum
output capacitance restriction. If the output capacitance is
too large, it will take too much time for the CPU core voltage
to ramp to the new value, violating the maximum transition
time specification. The worst-case dynamic VID change is
one that takes the largest step down at no load. The maxi-
mum capacitance as determined by the way LM2633 imple-
ments the VID change can be calculated as follows:
Example: t
1.35V, I
(Continued)
I
e_s
c_s
, otherwise the term under the square root will be a
, and L, but with increasing V
load
max
e
= 0.
c_s
= 6m , V
= 100µs, I
= 72mV, I
min
n
nlim
= 1.35V, V
decreases with decreasing R
c_s
= 20A, V
= 10A. Then R
n
and V
c_s
old
= 72mV, I
c_s
= 1.6V, V
.
e_s
= 7.2m .
new
c_s
(7)
(8)
(9)
e
=
=
,
27
Generally speaking, C
I
Power loss in output capacitors
In a typical buck regulator, the ripple current in the inductor
(and thus the output capacitors) is so small that it causes
very little power loss. The equation for calculating that loss
is:
Example: I
Output Inductor Selection
The size of the output inductor can be determined from the
assigned output ripple voltage budget and the impedance of
the output capacitors at switching frequency. The equation to
determine the minimum inductance value is as follows:
where min(V
17V. The reason this term is not simply V
switching frequency droops with increasing V
higher than 17V. See Active Frequency Control.
In the above equation, R
of the output capacitors. This is because in most cases, the
impedance of the output capacitors at the switching fre-
quency is very close to R
replace R
Example 1: V
6m , f = 250kHz.
Example 2: V
6m , f = 250kHz.
The actual selection process usually involves several itera-
tions of all of the above steps, from ripple voltage selection,
to capacitor selection, to inductance calculations. Both the
highest and the lowest CPU core voltages and their load
transient requirements should be considered. If an induc-
tance value larger than L
requirement is not violated. Priority should be given to pa-
rameters that are not flexible or more costly. For example, if
there are very few types of capacitors to choose from, it may
nlim
and I
load
e
rip
with the true impedance.
in_max
, but with increasing voltage step.
= 4.3A, R
in_max
in_max
, 17V) means the smaller of V
= 18V, V
= 21V, V
max
e
e
e
min
= 7 m .
. In the case of ceramic capacitors,
is used in place of the impedance
decreases with decreasing t
is selected, make sure the C
n
n
= 1.35V, V
= 1.6V, V
rip
rip
in_max
= 26mV, R
= 20mV, R
in
when V
www.national.com
in_max
is that the
max
(10)
(12)
(11)
and
in
e
e
min
is
=
=
,