tza3012ahw NXP Semiconductors, tza3012ahw Datasheet - Page 43

• Manufacturer Part Number: tza3012ahw
• Description: 30 Mbits/s Up To 3.2 Gbits/s A-ratetm Fibre Optic Receiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
2003 May 21
Parallel timing output: pins D00 to D15, D00Q to D15Q, FP, FPQ, PARITY, PARITYQ, POCLK, POCLKQ,
PRSCLO and PRSCLOQ
t
t
skew
skew
Reference: pin RREF
V
I
V
V
V
V
I
C
I
f
t
t
t
t
t
t
t
t
t
t
C
t
D-C
D-C
2
L
2
SCL
LOW
HD;STA
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
r
f
BUF
SP
SYMBOL
ref
C-bus pins SCL and SDA
IL
IH
hys
OL
i
C-bus timing
b
30 Mbits/s up to 3.2 Gbits/s
A-rate
data-to-clock delay
D00 to D15/POCLK
data-to-clock delay
D06 to D09/POCLK
duty cycle POCLK
channel to channel skew
D00 and Dn (between
channels)
channel to channel skew
D06 and D09 (between
channels)
reference voltage
LOW-level input voltage
HIGH-level input voltage
hysteresis of Schmitt trigger
inputs
SDA LOW-level output
voltage (open-drain)
leakage current
input capacitance
SCL clock frequency
SCL LOW time
hold time START condition
SCL HIGH time
set-up time START
condition
data hold time
data set-up time
set-up time STOP condition
SCL and SDA rise time
SCL and SDA fall time
bus free time between
STOP and START
capacitive load on each bus
line
pulse width of allowable
spikes
fibre optic receiver
PARAMETER
DMX 1:16, 1:10, 1:8;
see Fig.31; note 5
DMX 1:4; see Fig.31; note 5 150
DMX 1:16, 1:10, 1:8; note 5
DMX 1:4; note 5
10 to 20 k resistor to V
I
OL
= 3 mA
CONDITIONS
43
EE
40
1.17
0.8V
0.05V
0
1.3
0.6
0.6
0.6
0
100
0.6
20
20
1.3
0
100
10
MIN
CC
CC
100
180
50
1.21
TYP
TZA3012AHW
250
250
60
200
50
1.26
0.2V
0.4
10
100
0.9
300
300
400
50
Product specification
10
MAX
CC
ps
ps
%
ps
ps
V
V
V
V
V
pF
kHz
ns
ns
ns
pF
ns
UNIT
A
s
s
s
s
s
s
s