tmp89fm42k TOSHIBA Semiconductor CORPORATION, tmp89fm42k Datasheet - Page 48

• Manufacturer Part Number: tmp89fm42k
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.3
System clock controller
RA000
2.3.5.2
clock mode.
and generated from the clock that is a quarter of the low-frequency clock (fs) in the SLOW1/2 or SLEEP0/1
mode. Therefore, the machine cycle time is 1/fcgck [s] in the NORMAL2 or IDLE2 mode and is 4/fs [s] in
the SLOW1/2 or SLEEP0/1 mode.
cannot be used as I/O ports in the dual-clock mode.)
the internal high-frequency clock (fosc).
(XIN) and P01(XOUT) of the external high-frequency clock oscillation circuit can be used as general-purpose
I/O ports.
internal high-frequency clock (fosc) and then stop either of the high-frequency clocks not to be used. If a
mode transition is made with both the external and internal high-frequency clocks enabled, the transition may
not be performed properly.
(fh)".
tween the SLOW1 and SLOW2 modes, the high-frequency reference clock (fh) must be set in advance in the
NORMAL1 or NORMAL2 mode.
mode, activate the low-frequency clock by software.
(1)
(2)
The gear clock (fcgck) and the external low-frequency clock (fs) are used for the operation in the dual-
The main system clock (fm) is generated from the gear clock (fcgck) in the NORMAL2 or IDLE2 mode,
Pins P02 (XTIN) and P03 (XTOUT) are used for the low-frequency clock oscillation circuit. (These pins
The gear clock (fcgck) is generated from the high-frequency reference clock (fh).
The high-frequency reference clock (fh) can be selected from the external high-frequency clock (fc) and
When the internal high-frequency clock (fosc) is used as the high-frequency reference clock (fh), pins P00
Before switching the operating mode, be sure to select either the external high-frequency cock (fc) or the
For how to switch the high-frequency reference clock (fh), refer to "(1) High-frequency reference clock
SYSCR1<OSCSEL> cannot be changed when SYSCR1<SYSCK> is "1". Therefore, when switching be-
TLCS-870/C1 Series devices start up in the single-clock mode after reset release. To use the dual-clock
Dual-clock mode
time base timer) is "0", the operation is restarted by the instruction that follows the IDLE0 mode acti-
vation instruction.
using the gear clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
low-frequency clock (fs).
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
to NORMAL2.
When the IMF is "0" or when the IMF is "1" and the EF5 (the individual interrupt enable flag for the
In this mode, the CPU core operates using the gear clock (fcgck), and the peripheral circuits operate
In this mode, the CPU core and the peripheral circuits operate using the clock that is a quarter of the
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
Set SYSCR2<SYSCK> to switch the operation mode from NORMAL2 to SLOW2 or from SLOW2
In the SLOW2 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
NORMAL2 mode
SLOW2 mode
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TMP89FM42K