W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 122
W83697HFFDC
Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83697HFFDC.pdf
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Bit 4: Enable BEEP output for Temperature Sensor 1 if the monitor value exceed the limit value.
Bit 3: Enable BEEP output from AVCC (+5V), Write 1, enable BEEP output if the monitor value exceed
Bit 2: Enable BEEP output from +3.3V. Write 1, enable BEEP output, which is default value.
Bit 1: Reserved
Bit 0: Enable BEEP Output from VCORE if the monitor value exceed the limits value. Write 1,
9.7.20 BEEP Control Register 2-- Index 57h ( Bank 0 )
Register Location:
Power on Default Value 80h
Attribute:
Size:
Bit 7: Enable Global BEEP. Write 1, enable global BEEP output. Default 1. Write 0, disable all BEEP
Bit 6: Reserved. This bit should be set to 0.
Bit5: Reserved
Bit 4: Enable BEEP output for case open if case opened. Write 1, enable BEEP output. Default 0.
Bit 3: Reserved
Bit 2: Enable BEEP output from -5V, Write 1, enable BEEP output if the monitor value exceed the
Bit 1: Enable BEEP output from -12V, Write 1, enable BEEP output if the monitor value exceed the
Bit 0: Enable BEEP output from +12V, Write 1, enable BEEP output if the monitor value exceed the
Write 1, enable BEEP output. Default 0
the limits value. Default 0, that is disable BEEP output.
enable BEEP output, which is default value
output.
limits value. Default 0, that is disable BEEP output.
limits value. Default 0, that is disable BEEP output.
limits value. Default 0, that is disable BEEP output.
57h
Read/Write
8 bits
7
6
5
4
3
2
- 113 -
1
0
EN_V12_BP
EN_NV12_BP
EN_NV5_BP
Reserved
EN_CASO_BP
Reserved
Reserved
EN_GBP
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70
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