W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 165

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

CRF9 (Default 0x00)
10.14 Logical Device B (Hardware Monitor)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x00, 0x00)
CR70 (Default 0x00)
Bit 1
Bit 0
Bit 7- 3 : Reserved. Return zero when read.
Bit 2
Bit 1
Bit 0
Bit 7- 1 : Reserved.
Bit 0
Bit 7- 4 : Reserved.
Bit 3- 0 : These bits select IRQ resource for Hardware Monitor.
These two registers select Hardware Monitor base address [0x100:0xFFF] on 8-byte boundary.
: CIRIRQEN.
= 0
= 1
: MIDIIRQEN.
= 0
= 1
: PME_EN: Select the power management events to be either an
the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
= 0
= 1
: FSLEEP: This bit selects the fast expiry time of individual devices.
= 0
= 1
: SMIPME_OE: This is the SMI and
= 0
= 1
= 1
= 0
disable the generation of an SMI /
enable the generation of an SMI /
disable the generation of an SMI /
enable the generation of an SMI /
the power management events will generate an SMI event.
the power management events will generate an
1 S
8 mS
neither SMI nor
an SMI or
Activates the logical device.
Logical device is inactive.
PME
event will be generated.
PME
will be generated. Only the IRQ status bit is set.
PME
PME
PME
PME
PME
- 156 -
output enable bit.
interrupt due to CIR's IRQ.
interrupt due to MIDI's IRQ.
interrupt due to CIR's IRQ.
interrupt due to MIDI's IRQ.
PME
Publication Release Date: Feb. 2002
event.
PME
W83697HF/F
or SMI interrupt for
Revision 0.70