W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 156
W83697HFFDC
Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83697HFFDC.pdf
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10.9 Logical Device 6 (CIR)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x00, 0x00)
CR70 (Default 0x00)
10.10 Logical Device 7 (Game Port GPIO Port 1)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x02, 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select CIR I/O base address [0x100:0xFF8] on 8 byte boundary.
These two registers select the Game Port base address [0x100:0xFFF] on 8 byte boundary.
Bit 2
Bit 1
Bit 0
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for CIR.
Bit 7 - 1 : Reserved.
Bit 0
: HDUPLX. IR half/full duplex function select.
= 0
= 1
: TX2INV.
= 0
= 1
: RX2INV.
= 0
= 1
= 1
= 0
= 1
= 0
The IR function is Full Duplex.
The IR function is Half Duplex.
the SOUTB pin of UART B function or IRTX pin of IR function in normal condition.
inverse the SOUTB pin of UART B function or IRTX pin of IR function.
the SINB pin of UART B function or IRRX pin of IR function in normal condition.
inverse the SINB pin of UART B function or IRRX pin of IR function
Activates the logical device.
Logical device is inactive.
Activate Game Port./GP1
Game Port/GP1 is inactive.
- 147 -
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70
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