tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 252

• Manufacturer Part Number: tmp1941af
• Description: 32-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.7 Description of Registers Used in Clock-Synchronous 8-Bit SIO Mode
SBI0CR1
(0xFFFF_F240)
SBI0DBR
(0xFFFF_F241)
provides its status information for monitoring.
This section provides a summary of the registers which control clock-synchronous 8-bit SIO operation and
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Note:
Clear the SIOS bit and set the SIOINH bit before programming the transfer mode and serial
clock frequency bits.
Start
transfer
0: Stop
1: Start
SIOS
DB7
7
7
0
Serial Bus Interface Data Buffer Register
Serial Bus Interface Control Register 1
Figure 14.19 SIO Mode Registers (1)
Abort
transfer
0: Continue
1: Abort
SIOINH
DB6
6
6
0
TMP1941AF-212
W
Transfer mode
00: Transmit mode
01: Reserved
10: Transmit/Receive
11: Receive mode
SIOM1
mode
DB5
5
5
0
R (receive)/ W (transmit)
On writes: SCK[2:0] = Serial clock frequency
000
001
010
011
100
101
110
111
SIOM0
DB4
4
4
0
Undefined
n = 3
n = 4
n = 5
n = 6
n = 7
n = 8
n = 9

External clock
312.5
156.3
78.13
39.06
19.53
DB3



1.25
3
3
625
MHz
kHz
kHz
kHz
kHz
kHz
kHz
Serial clock frequency / Software
reset monitor
SCK2
DB2
2
2
0
TMP1941AF
Assumptions:
System clock: fc (= 40 MHz)
Clock gear: fc/1
φT0 = fperiph/4 (= 10 MHz)
Frequency =
W
SCK1
DB1
1
1
0
φ
2003-03-27
2
T
n
0
(Hz)
SCK0
R/W
DB0
0
0
1