tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 351
tmp1941af
Manufacturer Part Number
tmp1941af
Description
32-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1941AF.pdf
(354 pages)
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DMAC Bus Mastership
e.g., DMAC Ch. 1 Internal Select Signal
e.g., DMAC Ch. 2 Internal Select Signal
DMAC Ch. 3 Internal Select Signal
CS from External Bus I/F Unit
When Using Multiple DMAC Channels (External Bus Interface Unit)
Problem:
Switching between DMA channels might cause an external chip select (CS) signal to be incorrectly driven
active for one cycle. RD, WR, ALE and other external bus control signals are not driven active.
In cases where the DMAC continually assumes bus mastership, switching from one channel to another
causes channel 3 to be selected for one cycle as shown above. If the destination address for channel 3
references an external address space and a chip select is programmed for that address space, the external
bus interface unit drives the chip select signal off chip even though no bus cycle has been started.
•
Workaround:
The system hardware must be designed not to operate with CS alone.
Problem-Causing Situation:
A) The system hardware uses two or more DMAC channels.
B) The system hardware uses one or more external CS channels.
C) While a DMA request for one channel is being serviced, a next DMA request has been
D) The destination address for channel 3 points to an external address space. (Upon reset, the
This problem occurs when all of these conditions are true.
received on another channel and left pending. Or, two or more channels have received DMA
requests simultaneously.
content of the destination address register is undefined. Therefore, even when channel 3 is not
used, its destination address register might be pointing to an external address space.)
TMP1941AF-311
TMP1941AF
2003-03-27
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