lpc1778 NXP Semiconductors, lpc1778 Datasheet - Page 49

• Manufacturer Part Number: lpc1778
• Description: 32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 96 Kb Sram; Usb Device/host/otg; Ethernet; Lcd; Emc
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 7.
LPC178x_7x
Objective data sheet
Part
LPC1774FBD144 EMC_D[7:0]
LPC1772FBD208 EMC_D[31:0]
LPC1772FBD144 EMC_D[7:0]
External memory controller pin configuration
7.10.1 Features
Data bus pins Address bus
The LPC178x/7x EMC is an ARM PrimeCell MultiPort Memory Controller peripheral
offering support for asynchronous static memory devices such as RAM, ROM, and flash.
In addition, it can be used as an interface with off-chip memory-mapped devices and
peripherals. The EMC is an Advanced Microcontroller Bus Architecture (AMBA) compliant
peripheral.
See
Note: Synchronous static memory devices (synchronous burst mode) are not supported.
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Dynamic memory interface support including single data rate SDRAM.
Asynchronous static memory device support including RAM, ROM, and flash, with or
without asynchronous page mode.
Low transaction latency.
Read and write buffers to reduce latency and to improve performance.
8/16/32 data and 24 address lines wide static memory support.
16 bit and 32 bit wide chip select SDRAM memory support.
Static memory features include:
– Asynchronous page mode read
– Programmable Wait States
– Bus turnaround delay
– Output enable and write enable delays
– Extended wait
Four chip selects for synchronous memory and four chip selects for static memory
devices.
Power-saving modes dynamically control CKE and CLKOUT to SDRAMs.
Dynamic memory self-refresh mode controlled by software.
Controller supports 2048 (A0 to A10), 4096 (A0 to A11), and 8192 (A0 to A12) row
address synchronous memory parts. That is typical 512 MB, 256 MB, and 128 MB
parts, with 4, 8, 16, or 32 data bits per device.
Separate reset domains allow the for auto-refresh through a chip reset if desired.
Table 6
pins
EMC_A[15:0]
EMC_A[23:0]
EMC_A[15:0]
for EMC memory access.
All information provided in this document is subject to legal disclaimers.
Rev. 00.04 — 8 July 2010
Control pins
SRAM
EMC_BLS[3:2],
EMC_CS[1:0],
EMC_OE, EMC_WE
EMC_BLS[3:0],
EMC_CS_[3:0],
EMC_OE, EMC_WE
EMC_BLS[3:2],
EMC_CS[1:0],
EMC_OE, EMC_WE
32-bit ARM Cortex-M3 microcontroller
SDRAM
not available
EMC_RAS, EMC_CAS, EMC_DYCS[3:0],
EMC_CLK[1:0], EMC_CKE[3:0],
EMC_DQM[3:0]
not available
LPC178x/7x
© NXP B.V. 2010. All rights reserved.
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