p89v51rb2 NXP Semiconductors, p89v51rb2 Datasheet - Page 30

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p89v51rb2

Manufacturer Part Number
p89v51rb2
Description
8-bit 80c51 5 V Low Power 16/32/64 Kb Flash Microcontroller With 1 Kb Ram
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
P89V51RB2_RC2_RD2_4
Product data sheet
6.4.3 Mode 2
6.4.4 Mode 3
Mode 2 configures the Timer register as an 8-bit Counter (TLn) with automatic reload, as
shown in
contents of THn, which must be preset by software. The reload leaves THn unchanged.
Mode 2 operation is the same for Timer 0 and Timer 1.
When timer 1 is in mode 3 it is stopped (holds its count). The effect is the same as setting
TR1 = 0.
Timer 0 in mode 3 establishes TL0 and TH0 as two separate 8-bit counters. The logic for
mode 3 and Timer 0 is shown in
T0GATE, TR0, INT0, and TF0. TH0 is locked into a timer function (counting machine
cycles) and takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the
‘Timer 1’ interrupt.
Mode 3 is provided for applications that require an extra 8-bit timer. With Timer 0 in
mode 3, the P89V51RB2/RC2/RD2 can look like it has an additional Timer.
Note: When Timer 0 is in mode 3, Timer 1 can be turned on and off by switching it into
and out of its own mode 3. It can still be used by the serial port as a baud rate generator,
or in any application not requiring an interrupt.
Fig 9. Timer/counter 0 or 1 in mode 1 (16-bit counter)
Fig 10. Timer/counter 0 or 1 in mode 2 (8-bit auto-reload)
INTn pin
TnGate
INTn pin
Tn pin
osc/6
TnGate
TRn
Tn pin
osc/6
TRn
Figure
10. Overflow from TLn not only sets TFn, but also reloads TLn with the
Rev. 04 — 1 May 2007
C/T = 0
C/T = 1
C/T = 0
C/T = 1
Figure
11. TL0 uses the Timer 0 control bits: T0C/T,
control
control
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
(8-bits)
TLn
(8-bits)
(8-bits)
TLn
THn
reload
(8-bits)
THn
overflow
overflow
TFn
© NXP B.V. 2007. All rights reserved.
TFn
interrupt
002aaa521
002aaa520
interrupt
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