p89v51rb2 NXP Semiconductors, p89v51rb2 Datasheet - Page 41

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p89v51rb2

Manufacturer Part Number
p89v51rb2
Description
8-bit 80c51 5 V Low Power 16/32/64 Kb Flash Microcontroller With 1 Kb Ram
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
P89V51RB2_RC2_RD2_4
Product data sheet
The following examples will help to show the versatility of this scheme.
Example 1, slave 0:
Example 2, slave 1:
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1. Slave 1 requires
a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would be 1100 0001 since a ‘1’
in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed
with 1100 0000.
SADDR = 1100 0000
--------------------------------------------------- -
SADDR = 1100 0000
--------------------------------------------------- -
SADEN = 1111 1101
SADEN = 1111 1110
Fig 16. Schemes used by the UART to detect ‘given’ and ‘broadcast’ addresses when
Given = 1100 00X0
Given = 1100 000X
multiprocessor communications is enabled
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
saddr(7)
saddr(0)
saddr(7)
saddr(0)
logic used by UART to detect 'given address' in received data
logic used by UART to detect 'given address' in received data
Rev. 04 — 1 May 2007
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
.
.
.
.
.
.
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
given_address_match
broadcast_address_match
002aaa527
© NXP B.V. 2007. All rights reserved.
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