mc9s12uf32 Freescale Semiconductor, Inc, mc9s12uf32 Datasheet - Page 69

• Manufacturer Part Number: mc9s12uf32
• Description: System Chip Guide V01.05
• Manufacturer: Freescale Semiconductor, Inc

System on a Chip Guide — 9S12UF32DGV1/D V01.05
2.5.14 PA[7] / ADDR[15] / DATA[15] / CFD[15] / ATAD[15] — Port A I/O Pins
PA[7] is a general purpose input or output pin. In MCU expanded modes of operation, this pin is used for
the multiplexed external address and data bus. In single chip mode, this port can be configured as data bus
pin for CFHC or ATA5HC. Refer to Table 2-2 for module routing information. For further functional
information, do refer to CFHC and ATA5HC block guide.
2.5.15 PB[7:0] / ADDR[7:0] / DATA[7:0]/ CFD[7:0] / ATAD[7:0] / IOC[7:0] —
Port B I/O Pins
PB[7:0] are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus. In single chip mode, this port can be configured as
timer function or data bus for either CFHC or ATA5HC. Refer to Table 2-2 for module routing
information. For further functional information, do refer to TIM_16B8C, CFHC and ATA5HC block
guide.
2.5.16 PE7 / NOACC / CAF10— Port E I/O Pin 7
PE7 is a general purpose input or output pin. During MCU expanded modes of operation, the NOACC
signal, when enabled, is used to indicate that the current bus cycle is an unused or free cycle. In single chip
mode, this port can be configured as address pin for CFHC. Refer to Table 2-2 for module routing
information. For further functional information, do refer to CFHC block guide.
2.5.17 PE6 / MODB / IPIPE1 / CFA9 — Port E I/O Pin 6
PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE1. This pin is an input with a pull-down device which is only active
when RESET is low. In single chip mode, this port can be configured as address pin for CFHC. Refer to
Table 2-2 for module routing information. For further functional information, do refer to CFHC block
guide.
2.5.18 PE5 / MODA / IPIPE0 / CFA8 — Port E I/O Pin 5
PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE0. This pin is an input with a pull-down device which is only active
when RESET is low. In single chip mode, this port can be configured as address pin for CFHC. Refer to
Table 2-2 for module routing information. For further functional information, do refer to CFHC block
guide.
2.5.19 PE4 / ECLK— Port E I/O Pin 4 / E-Clock Output
PE4 is a general purpose input or output pin. It can also be configured as the output connection for the
internal bus clock (ECLK). ECLK is used to demultiplex the address and data in expanded modes and is
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