r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 166

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
11.2.6
Notes:
11.2.7
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
1. Changing the INTiPOL bit (i = 0 to 4) may set the IRKI bit in the INTiIC register to 1 (interrupt requested).
2. If the INTiPL bit in registers INTEN and INTEN1 is set to 1 (both edges), set the INTiPOL bit to 0 (falling edge
Address 00234h
Address 00236h
The IR bit in the KUPIC register may be set to 1 (interrupt requested) if the KIEN register is rewritten.
Refer to 11.9.4 Changing Interrupt Sources.
Symbol
Symbol
Refer to 11.9.4 Changing Interrupt Sources .
selected).
INT0POL INT0 polarity switch bit
INT1POL INT1 polarity switch bit
INT2POL INT2 polarity switch bit
INT3POL INT3 polarity switch bit
INT4POL INT4 polarity switch bit
Symbol
KI0EN
KI1EN
KI2EN
KI3EN
Bit
Symbol
Bit
KI0PL
KI1PL
KI2PL
KI3PL
INT Input Polarity Switch Register (INTPOL)
Key Input Interrupt Enable Register (KIEN)
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
KI3PL
b7
b7
—
0
0
KI0 input enable bit
KI0 input polarity select bit
KI1 input enable bit
KI1 input polarity select bit
KI2 input enable bit
KI2 input polarity select bit
KI3 input enable bit
KI3 input polarity select bit
Reserved
KI3EN
b6
b6
—
0
0
Bit Name
Bit Name
KI2PL
b5
b5
—
0
0
INT4POL INT3POL INT2POL INT1POL INT0POL
KI2EN
b4
b4
0
0
0: Falling edge
1: Rising edge
Set to 0.
0: Disabled
1: Enabled
0: Falling edge
1: Rising edge
0: Disabled
1: Enabled
0: Falling edge
1: Rising edge
0: Disabled
1: Enabled
0: Falling edge
1: Rising edge
0: Disabled
1: Enabled
0: Falling edge
1: Rising edge
KI1PL
b3
b3
0
0
KI1EN
b2
b2
0
0
(2)
Function
Function
KI0PL
b1
b1
0
0
KI0EN
b0
b0
0
0
Page 135 of 725
11. Interrupts
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W