r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 671
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Part Number:
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Renesas Electronics America
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
26.5.7
Table 26.6
WA: Write address
WD: Write data
BA: Any address of the block
BT: Start address of the block
×: Any address in the user ROM area
Read array
Clear status register
Program
Block erase
Lock bit program
Read lock bit status
Block blank check
26.5.7.1
26.5.7.2
The software commands are described below. Read or write commands and data in 8-bit units.
Do not input any command other than those listed in the table below.
The read array command is used to read the flash memory.
When FFh is written in the first bus cycle, the MCU enters read array mode. When the read address is input in
the following bus cycles, the content of the specified address can be read in 8-bit units.
Since read array mode is retained until another command is written, the contents of multiple addresses can be
read continuously.
In addition, after a reset, the MCU enters read array mode after a program, block erase, block blank check, read
lock bit status, or clear status register command, or after entering erase-suspend.
The clear status register command is used to set bits FST4 and FST5 in the FST register to 0.
When 50h is written in the first bus cycle, bits FST4 and FST5 in the FST register are set to 0.
Command
Software Commands
Clear Status Register Command
Preliminary document
Specifications in this document are tentative and subject to change.
Software Commands
Read Array Command
Mode
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Address
WA
BT
×
×
×
×
×
Data
FFh
50h
40h
20h
77h
71h
25h
Mode
Write
Write
Write
Write
Write
—
—
Second Bus Cycle
Address
WA
BA
BA
BT
BT
—
—
26. Flash Memory
Page 640 of 725
Data
D0h
D0h
D0h
D0h
WD
—
—
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