r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 546
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Part Number:
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 21.39
21.4.8
In the I
the SIRST bit in the SICR2 register.
The reset procedure using the SIRST bit is shown below.
When the control block is reset (as in Figure (2)), the corresponding IR bit in the SSUIC_0/IICIC_0 register for
the ICU may be set to 1 (interrupt requested).
For the usage notes on clearing the IR bit, refer to
SICR1 register
SICR2 register
SICR1 register
SIMR2 register
SIMR2 register
SICR2 register
SICR1 register
Procedure for Resetting Control Block in I
2
Set registers IICCR, SICR1, SICR2,
C bus interface, some of the I
No
Preliminary document
Specifications in this document are tentative and subject to change.
Procedure for Resetting Control Block in I
SIMR1, SIER, and SIMR2
Clear SISR register
SCL = 1 and
Yes
SDA = 1
Start
End
ICE bit 0
SIRST bit 1
Bits MST and TRS 0
MS bit 1
MS bit 0
SIRST bit 0
ICE bit 1
2
C bus function registers and the control block can be reset by writing 1 to
11.9.4 Changing Interrupt Sources
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(1) Stop the I
(2) Reset the control block.
(3) Enter I
(4) Wait until the bus is released.
(5) Enter clock synchronous serial mode.
(6) Enter I
(7) Clear the status register by writing 0 after reading 1.
(8) Cancel the control block reset.
(9) Initial setting of I
(10) Enable the I
(The BBSY bit is cleared).
2
C bus Interface Mode
2
2
2
C slave receive mode.
C bus interface mode.
C bus Interface Mode
2
C pin output.
21. Clock Synchronous Serial Interface
2
C pin output.
2
C transfer
.
Page 515 of 725
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