r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 97
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
7.4
Figure 7.5
To use the voltage monitoring 0 reset, set the LVDAS bit in the OFS register to 0 (voltage monitoring 0 reset
enabled after reset).
Figure 7.5 shows an Example of Voltage Monitor 0 Reset Operation.
Voltage Monitor 0 Reset
Internal reset signal
When the internal reset signal goes low, the CPU, SFRs, and I/O ports are initialized.
When the internal reset signal changes from low to high, program execution starts from the address indicated by the reset
vector.
For the states of the SFRs, refer to the Special Function Registers (SFRs) section shown in the Address Space chapter.
Vdet0
Preliminary document
Specifications in this document are tentative and subject to change.
Example of Voltage Monitor 0 Reset Operation
VCC
fLOCO
1
32
7. Voltage Detection Circuit
Page 66 of 725
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