km416s1120d ETC-unknow, km416s1120d Datasheet - Page 25

• Manufacturer Part Number: km416s1120d
• Description: 512k X 16bit X 2 Banks Synchronous Dram Lvttl
• Manufacturer: ETC-unknow

KM416S1120D
FUNCTION TRUTH TABLE (TABLE 2)
Abbreviations : ABI = All Banks Idle, RA = Row Address
*Note : 6. CKE low to high transition is asynchronous.
Precharge
other than
Any State
Current
Refresh
Power
Banks
Down
Banks
Listed
above
State
Self
Idle
All
All
7. CKE low to high transition is asynchronous if restarts internal clock.
8. Power down and self refresh can be entered only from the both banks idle state.
9. Must be a legal command.
A minimum setup time 1CLK + t
(n-1)
CKE
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
CKE
n
H
H
H
H
H
H
H
H
H
H
H
H
H
X
L
X
L
L
L
L
L
L
L
L
L
L
L
CS
X
H
X
X
H
X
X
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
SS
must be satisfied before any command other than exit.
RAS
X
X
H
H
H
X
X
X
H
H
H
X
X
X
H
H
H
X
X
X
X
X
L
L
L
L
L
CAS
X
X
H
H
X
X
X
X
H
H
X
X
X
X
H
H
H
X
X
X
X
X
L
L
L
L
L
WE
X
X
H
X
X
X
X
X
H
X
X
X
X
X
H
X
H
H
X
X
X
X
X
L
L
L
L
- 25
OP Code
ADDR
RA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID
Exit Self Refresh --> Idle after t
Exit Self Refresh --> Idle after t
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Self Refresh)
INVALID
Exit Power Down --> ABI
Exit Power Down --> ABI
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Low Power Mode)
Refer to Table 1
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
Row (& Bank) Active
Enter Self Refresh
Mode Register Access
NOP
Refer to Operations in Table 1
Begin Clock Suspend next cycle
Exit Clock Suspend next cycle
Maintain Clcok Suspend
ACTION
CMOS SDRAM
Rev. 1.4 (Jun. 1999)
RFC
RFC
(ABI)
(ABI)
Note
6
6
7
7
8
8
8
9
9