km416s1120d ETC-unknow, km416s1120d Datasheet - Page 34

• Manufacturer Part Number: km416s1120d
• Description: 512k X 16bit X 2 Banks Synchronous Dram Lvttl
• Manufacturer: ETC-unknow

DQ
CLOCK
KM416S1120D
Read & Write Cycle with Auto Precharge I @Burst Length=4
A
ADDR
DQM
10
CKE
RAS
CAS
/AP
WE
CS
BA
CL=2
CL=3
*Note:
0
Row Active
(A-Bank)
Ra
Ra
1
* When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- if Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.
auto precharge will start at B Bank read command input point .
2
3
Row Active
(B-Bank)
Rb
Rb
4
Read with
Auto Pre
(A-Bank)
charge
Ca
5
6
precharge(B-Bank)
Read without Auto
Auto Precharge
Qa0
Cb
Start Point
(A-Bank)*
7
Qa1
Qa0
8
Qb0
Qa1
- 34
9
HIGH
Qb1
Qb0
10
Precharge
(B-Bank)
Qb2
Qb1
11
Qb3
Qb2
12
Qb3
13
14
Row Active
(A-Bank)
Ra
Ra
15
CMOS SDRAM
Rev. 1.4 (Jun. 1999)
16
17
Auto Precharge
18
Write with
(A-Bank)
: Don't care
Da0
Ca
Da0
19
Da1
Da1