sc16c2550b NXP Semiconductors, sc16c2550b Datasheet - Page 21

• Manufacturer Part Number: sc16c2550b
• Description: 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 16-byte Fifos
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SC16C2550B_4
Product data sheet
7.6 Modem Control Register (MCR)
Table 16.
Table 17.
This register controls the interface with the modem or a peripheral device.
Table 18.
LCR[2]
0
1
1
LCR[1]
0
0
1
1
Bit
7:5
4
3
2
1
0
Symbol
MCR[7:5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
LCR[2] stop bit length
LCR[1:0] word length
Modem Control Register bits description
Word length (bits)
5, 6, 7, 8
5
6, 7, 8
LCR[0]
0
1
0
1
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Description
reserved; set to ‘0’
Loop-back. Enable the local Loop-back mode (diagnostics). In this mode
the transmitter output (TX) and the receiver input (RX), CTS, DSR, CD and
RI are disconnected from the SC16C2550B I/O pins. Internally the modem
data and control pins are connected into a loop-back data configuration
(see
fully operational. The Modem Control Interrupts are also operational, but
the interrupts’ sources are switched to the lower four bits of the Modem
Control. Interrupts continue to be controlled by the IER register.
OP2/INT enable
(OP1). OP1A/OP1B are not available as an external signal in the
SC16C2550B. This bit is instead used in the Loop-back mode only. In the
Loop-back mode, this bit is used to write the state of the modem RI
interface signal.
RTS
DTR
Rev. 04 — 15 February 2007
logic 0 = disable Loop-back mode (normal default condition)
logic 1 = enable local Loop-back mode (diagnostics)
logic 0 = forces INT (A, B) outputs to the 3-state mode and sets OP2 to a
logic 1 (normal default condition)
logic 1 = forces the INT (A, B outputs to the active mode and sets OP2 to
a logic 0
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
Word length (bits)
5
6
7
8
Figure
7). In this mode, the receiver and transmitter interrupts remain
Stop bit length (bit times)
1
1
2
1
2
SC16C2550B
© NXP B.V. 2007. All rights reserved.
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