wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 76

• Manufacturer Part Number: wm8918
• Description: Ultra Low Power Dac For Portable Audio Applications
• Manufacturer: Wolfson Microelectronics plc

WM8918
DC SERVO
w
Refer to the “Clocking and Sample Rates” section for more detail on the FLL and clocking
configuration.
The Charge Pump control fields are described in Table 47.
Table 47 Charge Pump Control
The WM8918 provides four DC servo circuits, two on the headphone outputs HPOUTL and HPOUTR
and two on the line outputs LINEOUTL and LINEOUTR, to remove DC offset from these ground-
referenced outputs. When enabled, the DC servos ensure that the DC level of these outputs remains
within 1mV of ground. Removal of the DC offset is important because any deviation from GND at the
output pin will cause current to flow through the load under quiescent conditions, resulting in
increased power consumption. Additionally, the presence of DC offsets can result in audible pops
and clicks at power up and power down.
The recommended usage of the DC Servo is initialised by running the default Start-Up sequence as
described in the “Control Write Sequencer” section. The default Start-Up sequence executes a series
of DC offset corrections, after which the measured offset correction is maintained on the headphone
output channels. If a different usage is required, e.g. if a periodic DC offset correction is required,
then the default Start-Up sequence may be modified according to specific requirements. The relevant
control fields are described in the following paragraphs and are defined in Table 48.
DC SERVO ENABLE AND START-UP
The DC Servo circuits are enabled on HPOUTL and HPOUTR by setting DCS_ENA_CHAN_0 and
DCS_ENA_CHAN_1 respectively. Similarly, the DC Servo circuits are enabled on LINEOUTL and
LINEOUTR by setting DCS_ENA_CHAN_2 and DCS_ENA_CHAN_3 respectively When the DC
Servo is enabled, the DC offset correction can be commanded in a number of different ways,
including single-shot and periodically recurring events.
Writing a logic 1 to DCS_TRIG_STARTUP_n initiates a series of DC offset measurements and
applies the necessary correction to the associated output; (‘n’ = 3 for LINEOUTR channel, 2 for
LINEOUTL channel, 1 for HPOUTR channel, 0 for HPOUTL channel). On completion, the output will
be within 1mV of AGND. This is the DC Servo mode selected by the default Start-Up sequence.
Completion
DCS_STARTUP_COMPLETE field, as described in Table 48. Typically, this operation takes 86ms
per channel.
Writing a logic 1 to DCS_TRIG_DAC_WR_n causes the DC offset correction to be set to the value
contained in the DCS_DAC_WR_VAL_n fields in Registers R73 to R76. This mode is useful if the
required offset correction has already been determined and stored; it is faster than the
DCS_TRIG_STARTUP_n mode, but relies on the accuracy of the stored settings. Completion of the
DC offset correction triggered in this way is indicated by the DCS_DAC_WR_COMPLETE field, as
described in Table 48. Typically, this operation takes 2ms per channel.
R98 (62h)
Charge
Pump 0
R104 (68h)
Class W (0)
REGISTER
ADDRESS
of
the
BIT
0
0
DC
CP_DYN_PWR
offset
CP_ENA
LABEL
correction
DEFAULT
triggered
0
0
in
Enable charge-pump digits
0 = disable
1 = enable
Enable dynamic charge pump power
control
0 = Charge pump controlled by
volume register settings (Class G)
1 = Charge pump controlled by real-
time audio level (Class W)
Class W is recommended for lowest
power consumption
this
PD, Rev 4.0, September 2010
way
DESCRIPTION
is
indicated
Production Data
by
76
the