wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 96

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wm8918

Manufacturer Part Number
wm8918
Description
Ultra Low Power Dac For Portable Audio Applications
Manufacturer
Wolfson Microelectronics plc
Datasheet

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WM8918
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CLOCKING CONFIGURATION
The WM8918 supports a wide range of standard audio sample rates from 8kHz to 96kHz. The
Automatic Clocking Configuration simplifies the configuration of the clock dividers in the WM8918 by
deriving most of the necessary parameters from a minimum number of user registers.
The SAMPLE_RATE field selects the sample rate, fs, of the DAC.
The CLK_SYS_RATE field must be set according to the ratio of SYSCLK to fs. When these fields
are set correctly, the Sample Rate Decoder circuit automatically determines the clocking
configuration for all other circuits within the WM8918.
A high performance mode of DAC operation can be selected by setting the DAC_OSR128 bit; in
48kHz sample mode, the DAC_OSR128 feature results in 128x oversampling. Audio performance is
improved, but power consumption is also increased.
Table 58 Automatic Clocking Configuration Control
DMIC / DAC CLOCK CONTROL
The clocking of the DMIC and DAC circuits is derived from CLK_DSP, which is enabled by
CLK_DSP_ENA. CLK_DSP is generated from SYSCLK which is separately enabled, using the
register bit CLK_SYS_ENA.
Higher performance DAC operation can be achieved by increasing the DAC oversample rate - see
Table 58.
The DMIC / DAC Clock Control registers are defined in Table 59.
Table 59 DMIC / DAC Clock Control
R33 (21h)
DAC Digital
1
R21 (15h)
Clock Rates
1
REGISTER
ADDRESS
R22 (16h)
Clock Rates 2
REGISTER
ADDRESS
13:10
BIT
2:0
BIT
6
1
SAMPLE_RATE
CLK_SYS_RAT
CLK_DSP_ENA
DAC_OSR128
LABEL
LABEL
E [3:0]
[2:0]
DEFAULT
DEFAULT
0011
101
0
0
DAC Oversample Rate Select
0 = Low power (normal OSR)
1 = High performance (double OSR)
Selects the SYSCLK / fs ratio
0000 = 64
0001 = 128
0010 = 192
0011 = 256
0100 = 384
0101 = 512
0110 = 768
0111 = 1024
1000 = 1408
1001 = 1536
Selects the Sample Rate (fs)
000 = 8kHz
001 = 11.025kHz, 12kHz
010 = 16kHz
011 = 22.05kHz, 24kHz
100 = 32kHz
101 = 44.1kHz, 48kHz
110 to 111 = Reserved
DSP Clock enable
0 = Disabled
1 = Enabled
PD, Rev 4.0, September 2010
DESCRIPTION
DESCRIPTION
Production Data
96

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