wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 83

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wm8918

Manufacturer Part Number
wm8918
Description
Ultra Low Power Dac For Portable Audio Applications
Manufacturer
Wolfson Microelectronics plc
Datasheet

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Figure 42 TDM with WM8918 as Master
Figure 44 TDM with Processor as Master
Note: The WM8918 is a 24-bit device. If the user operates the WM8918 in 32-bit mode then the 8
LSBs will be ignored on the receiving side and not driven on the transmitting side. It is therefore
recommended to add a pull-down resistor if necessary to the AIFRXDAT line and the AIFTXDAT line
in TDM mode.
BCLK FREQUENCY
The BCLK frequency is controlled relative to SYSCLK by the BCLK_DIV divider. Internal clock divide
and phase control mechanisms ensure that the BCLK and LRCLK edges will occur in a predictable
and repeatable position relative to each other and relative to the data for a given combination of DAC
sample rate and BCLK_DIV settings.
BCLK_DIV is defined in the “Digital Audio Interface Control” section. See also the “Clocking and
Sample Rates” section for more information.
Figure 43 TDM with Other CODEC as Master
PD, Rev 4.0, September 2010
WM8918
83

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