wm8215 Wolfson Microelectronics plc, wm8215 Datasheet - Page 20

• Manufacturer Part Number: wm8215
• Description: 60msps 10-bit 3-channel Ccd Digitiser
• Manufacturer: Wolfson Microelectronics plc

WM8215
REFERENCES
POWER MANAGEMENT
LINE-BY-LINE OPERATION
CONTROL INTERFACE
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The ADC reference voltages are derived from an internal bandgap reference, and buffered to pins
VRT and VRB where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and
also requires decoupling. The output buffer from the RLCDAC also requires decoupling at pin
VRLC/VBIAS.
The ADC references can be switched from the default values (VRT=2.05V, VRB=1.05V, ADC input
range=2V) to give a smaller ADC reference range (VRT=1.85V, VRB=1.25V, ADC input range=1.2V)
under control of the LOWREFS register bit. Setting LOWREFS=1 allows smaller input signals to be
accommodated.
Note:
When LOWREFS = 1 the output of the RLCDAC will scale if RLCDACRNG = 1. The max output
from RLCDAC will change from 2.05 to 1.85V and the step size will proportionally reduce.
Power management for the device is performed via the Control Interface. By default the device is
fully enabled. The EN bit allows the device to be fully powered down when set low. Individual blocks
can be powered down using the bits in Setup Register 5. When in one or two channel mode the
unused input channels are automatically disabled to reduce power consumption.
Certain linear sensors give colour output on a line-by-line basis (i.e. a full line of red pixels followed
by a line of green pixels followed by a line of blue pixels). Often the sensor will have only a single
output onto which these outputs are time multiplexed.
The WM8215 can accommodate this type of input by setting the LINEBYLINE register bit high.
When in this mode the green and blue input PGAs are disabled to save power. The analogue input
signal should be connected to the RINP pin. The offset and gain values that are applied to the Red
input channel can be selected, by internal multiplexers, to come from the Red, Green or Blue offset
and gain registers. This allows the gain and offset values for each of the input colours to be setup
individually at the start of a scan.
When register bit ACYC=0, the gain and offset multiplexers are controlled via the INTM[1:0] register
bits. When INTM=00, the red offset and gain control registers are used to control the Red input
channel. Likewise, INTM=01 selects the green offset and gain registers and INTM=10 selects the
blue offset and gain registers to control the Red input channel.
When register bit ACYC=1, ‘auto-cycling’ is enabled, and the input channel switches to the next
offset and gain registers in the sequence when a pulse is applied to the RSMP input pin. The
sequence is Red → Green → Blue → Red… offset and gain registers applied to the single input
channel. A write to the Auto-cycle reset register (address 05h) will reset the sequence to a known
state (Red registers selected).
When auto-cycling is enabled, the RSMP pin alone cannot be used to control reset level clamping.
Reset level clamping may be enabled in this situation by setting the CLAMPCTRL and RLCEN bits
so that the logical AND of RSMP and VSMP closes the clamp switch.
Additionally, when auto-cycling is enabled, the RSMP pin cannot be used for reset sampling (i.e.
CDS must be set to 0).
The internal control registers are programmable via the serial digital control interface. The register
contents can be read back via the serial interface on pin OP[9]/SDO.
It is recommended that a software reset is carried out after the power-up sequence, before writing to
any other register. This ensures that all registers are set to their default values (as shown in Table
5).
PD, Rev 4.2, February 2009
Production Data
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