wm8215 Wolfson Microelectronics plc, wm8215 Datasheet - Page 4

• Manufacturer Part Number: wm8215
• Description: 60msps 10-bit 3-channel Ccd Digitiser
• Manufacturer: Wolfson Microelectronics plc

WM8215
PIN DESCRIPTION
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PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
VRLC/VBIAS
OP[9]/SDO
DVDD2
AGND1
AGND2
DVDD1
RSMP
DGND
VSMP
MCLK
AVDD
NAME
OP[0]
OP[1]
OP[2]
OP[3]
OP[4]
OP[5]
OP[6]
OP[7]
OP[8]
GINP
BINP
RINP
SEN
SCK
VRB
VRX
OEB
VRT
SDI
NC
NC
Analogue output
Analogue output
Analogue output
Analogue input
Analogue input
Analogue input
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Analogue I/O
Digital input
Digital input
Digital input
Digital input
Digital input
Digital input
Digital input
No connect
No connect
Supply
Supply
Supply
Supply
Supply
Supply
TYPE
DESCRIPTION
Reset sample pulse (when CDS=1) or clamp control
Master (ADC) clock. This clock determines the ADC conversion rate.
Digital ground.
Enables the serial interface when high.
Digital supply, all digital I/O pins.
Serial data input.
Serial clock.
No internal connection.
No internal connection.
Digital output data bus. ADC output data (d9:d0) is available in 10-bit parallel
format.
d0 (LSB)
d1
d2
d3
d4
d5
d6
d7
d8
d9 (MSB)
Alternatively, pin OP[9]/SDO may be used to output register read-back data when
OEB=0, OPD(register bit)=0 and SEN has been pulsed high. See Serial Interface
description in Device Description section for further details.
Analogue supply. This must be operated at the same potential as DVDD1.
Analogue ground.
Lower reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Upper reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Input return bias voltage.
This pin must be connected to AGND via a decoupling capacitor.
Selectable analogue output voltage for RLC or single-ended bias reference.
This pin would typically be connected to AGND via a decoupling capacitor.
VRLC can be externally driven if programmed Hi-Z.
Blue channel input video.
Green channel input video.
Red channel input video.
Analogue ground.
Digital supply for logic and clock generator. This must be operated at the same
potential as AVDD.
Output Hi-Z control. All digital outputs set to high-impedance state when input pin
OEB=1 or register bit OPD=1.
Video sample pulse.
PD, Rev 4.2, February 2009
Production Data
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